Chunghwa Picture Tubes, Ltd.

Fu-Yuan Shiau

Meng-Chi Liou

Ming-Zen Wu

Kuang-Hsiang Lin

Yu-Liang Wen

Chih-Yu Chen

Yuan-Hao Chang

Chien-Chih Jen

Meng-Chi Liu

Huang-Chang Wang

Yan-Chun Chiu

Chung-Ge Lin

Kuang-Shyang Lin

Yung-Hui Chang

Chun-Hung Tung

An inspecting circuit layout according to the present invention is provided. The inspecting circuit layout is adapted for inspecting panel units group by group, each of the panel units having a plurality of first and second signal lines. The inspecting circuit layout includes a multiplexer (MUX) and an inspecting pad. The MUX is electrically connected with at least one of the first or second signal lines of the panel units, and the inspecting pad is electrically connected to the MUX. The MUX is adapted for selectively connecting the inspecting pad with the first or second signal lines of a group of panel units.

Method for fabricating a LCD panel

A liquid crystal display with electrostatic discharge protection includes an inner short-ring which surrounds the display region and an outer short-ring which surrounds the inner short-ring, wherein the inner short-ring and the outer short-ring are both located near the panel edge. The inner short-ring is connected with the display region indirectly, and the outer short-ring is electrically connected with the display region and the inner short-ring at the same time. The inner short-ring is electrically connected with the display region through the outer short-ring, and the inner short-ring can serve as a repair line after edge grinding the panel.

Liquid crystal display panel with electrostatic discharge protection

A liquid crystal display (LCD) panel and inspection method thereof. The LCD panel includes a first substrate having a reflective material layer formed on a first side of the first substrate; a second substrate having a black matrix formed on a first side of the second substrate, the first side of the second substrate face on to the first side of the first substrate; and a liquid crystal layer sandwiched between the first substrate and the second substrate; wherein the second substrate has at least one inspection area allowing light to pass to the first side of the first substrate. The inspection method includes: passing light through the inspection area to the first side of the first substrate; and inspecting cell process parameters of the LCD panel through light reflected from the first side of the first substrate.

Liquid crystal display device and inspection method thereof

Inspecting circuit layout for LCD panel and fabricating method for LCD panel

A liquid crystal display with defect reparability including two vertical common lines and a plurality of horizontal common lines in a pixel, wherein the vertical common lines are parallel to a data line, and each horizontal common line is intersected to connect with each vertical common line. Each horizontal common line is extended to pass through but not touch the data line and connect with a horizontal common line in a neighboring pixel, and the horizontal common lines have overlaps with the data line in a different plane.

Liquid crystal display with defect reparability

A multi-domain vertical alignment liquid crystal display (MVA LCD) panel has a bottom substrate, a top substrate parallel to the bottom substrate, and a liquid crystal molecule layer filled in between. The panel further has a plurality of pixel regions arranged in arrays on the bottom substrate, a plurality of common lines traversing the pixel regions, a plurality of pixel electrodes positioned in each pixel region above the common lines, a plurality of slits positioned on each pixel electrode, a common electrode layer positioned on the surface of the top substrate, and a plurality of protrusions arranged parallel to and alternatively with the slits and positioned on the surface of the common electrode layer. The protrusions and the common lines are partially overlapped.

Multi-domain vertical alignment liquid crystal display panel comprising alternating and parallel slits and protrusions

A manufacturing method of thin film transistor array substrate is provided. A substrate, whereon first, second, and third poly-silicon islands, a gate insulating layer, a plurality of first, second, and third gates, and a first passivation layer have been formed, is provided. A third patterned photoresist layer is formed on the first passivation layer by using a third half-tone mask. A first ion implantation process is performed with the third patterned photoresist layer as mask to form first sources/drains. A portion of the thickness of the third patterned photoresist layer is removed, and then portions of the first passivation layer and the gate insulating layer are removed with the third patterned photoresist layer as mask to form the first patterned passivation layer. The third patterned photoresist layer is removed. First, second and third source/drain conductive layers, a second patterned passivation layer, and pixel electrodes are formed in sequence.

Manufacturing method of thin film transistor array substrate

An array of active devices and a method for testing an array of active devices are provided. The array comprises a substrate, a plurality of scan lines, a plurality of data lines, a plurality of pixel units and a plurality of test pads. The substrate comprises a display area and a peripheral area. The scan lines and the data lines are positioned on the substrate, and enclose a plurality of pixel areas and dummy pixel areas in the display area and the peripheral area, respectively. The pixel units are positioned in the pixel areas and are connected to the scan lines and the data lines, respectively. Finally, The test pads are positioned close to the scan lines and/or the data lines, and positioned on the substrate and in the peripheral area. Each of the test pads is connected to the corresponding data line or the corresponding scan line.

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Chiayi, Taiwan

Fu-Yuan Shiau