Taiwan Semiconductor Manufacturing Comp. Ltd.

Fu-Tien Wong

Chih-Kung Chang

Hung-Jen Hsu

Yu-Kung Hsiao

Chung-Sheng Hsiung

Chin-Chen Kuo

Ming-Fa Chen

Sheng-Liang Pan

Yi-Ming Dai

Chia-Hsiang Chen

Kuo-Liang Lu

Chih-Chien Hung

Te-Fu Tseng

Chin Chen Kuo

Chiu-Kung Chang

Sheng Liang Pan

Sung-Yung Yang

Po-Wen Lin

Chung Sheng Hsiung

A method for forming an image sensor device. An alignment mark is formed on or in a substrate with distance from the alignment mark to the substrate edge less than about 3 mm. An array of active photosensing pixels is formed on the substrate. At least one dielectric layer is formed covering the substrate and the array. A color filter photoresist is formed on the least one dielectric layer. Subsequent to removal of the color filter photoresist from the alignment mark, the color filter photoresist is exposed with alignment to the alignment mark.

CMOS image sensor

An image sensor improving the uniformity of effective incident light. In one example, the size of microlenses disposed in different regions of the image sensor is changed to balance the brightness in different regions, in which the size of each microlens is a function of the distance between the microlens to the chip center In another example, the distance between the center of the microlens and the center of the corresponding sensing area is changed to balance the brightness in different regions and the corresponding color filters are shifted such that the microlens is overlying a corresponding color filter unit without overlying adjacent regions thereof, in which the distance between the center of the microlens and the center of the corresponding sensing area is a function of the distance between the corresponding sensing area to the chip center.

Image sensor with improved uniformity of effective incident light

A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.

Method for fabricating microelectronic product with attenuated bond pad corrosion

Within a method for forming a planarizing layer within a microelectronic fabrication, there is employed formed upon a partially photoexposed planarizing layer formed of a partially photoexposed negative photoresist material a sacrificial layer. Within the method, when sequentially: (1) stripping from the partially photoexposed planarizing layer the sacrificial layer; and (2) developing the partially photoexposed planarizing layer to form a developed planarizing layer, the developed planarizing layer is formed with enhanced planarity and diminished thickness.

Method for forming crack resistant planarizing layer within microelectronic fabrication

Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.

Color filter image array optoelectronic microelectronic fabrication with a planarizing layer formed upon a concave surfaced color filter region

A method of forming circuit patterns on a semiconductor wafer using two different image steppers having nonaligned optical image systems achieves optical alignment of multiple overlays with high accuracy. A first alignment mark is imaged by the first stepper onto a material layer deposited on the wafer, and a second alignment mark is imaged onto a subsequently deposited material layer using the second stepper. Alignment of the two marks, and thus of successively imaged, overlying circuit patterns, is achieved by translating the optical coordinates of the second alignment system into the those of the first alignment system, and then making corresponding two dimensional adjustment of the wafer position relative to the second stepper.

Method of forming circuit patterns on semiconductor wafers using two optical steppers having nonaligned imaging systems

Growing community of inventors

Taoyuan, Taiwan

Fu-Tien Wong