Infineon Technologies Ag

Infineon Technologies North America Corp.

Fritz Mistlberger

William G Bliss

Stephen James Franck

James Wilson Rae

Razmik Karabed

Sasan Cyrusian

Jonathan James Ashley

Elmar Bach

Thomas Blon

Heinrich J Stockmanns

Michael A Ruegg

Siegfried Hart

Matthias Driller

Ulrich Huewels

Sriharsha Annadore

Dominik Margraf

A method and apparatus for running an analog portion ( ) of a read/write channel ( ) from a highly regulated power supply ( ). The apparatus includes an analog portion ( ), a clock synthesizer ( ), and a highly regulated power supply ( ) connected to the analog portion ( ) and the clock synthesizer ( ). The analog portion ( ) and the clock synthesizer ( ) both comprise high voltage transistors which operate in a first voltage range and low voltage transistors which operate in a second voltage range, wherein the first voltage range is within the second voltage range. The highly regulated power supply ( ) supplies power that is within the first voltage range to the analog portion ( ) and the clock synthesizer ( ). The method includes generating power that is within the first voltage range using the highly regulated power supply ( ), and supplying the power to the analog portion ( ) and the clock synthesizer ( ).

Efficient analog front end for a read/write channel of a hard disk drive running from a highly regulated power supply

An improved sampled amplitude read/write channel is provided. The system is an integrated Generalized Partial Response Maximum Likelihood (GPRML) read channel incorporating Read, Write, and Servo modes of operation. One implementation includes a 32/34 rate parity code and matched Viterbi detector, a 32 state Viterbi detector optimal parity processor, robust frame synchronization, self-adaptive equalization, thermal asperity detection and compensation, adaptive magneto-resistive asymmetry compensation, low latency interpolated timing recovery and programmable write precompensation.

Read/write channel

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Munich, Georgia

Fritz Mistlberger