Ams Ag

Friedrich Peter Leisenberger

Gregor Schatzberger

Jong Mun Park

Peter Sarson

A memory arrangement comprises a non-volatile memory plane (), a replacement plane (), an address select block (), and a counter arrangement () having at least one counter (to). The at least one counter (to) is configured to be incremented at a write cycle of the memory arrangement (). The address select block () is configured to switch from the non-volatile memory plane () to the replacement plane (), if a counter value of the at least one counter (to) is higher than a predetermined limit.

Memory arrangement and method for operating or testing a memory arrangement

The ultraviolet sensor device comprises a semiconductor substrate, a dielectric layer above the substrate, a surface of the dielectric layer that is provided for the incidence of ultraviolet radiation, a floating gate electrode in the dielectric layer and an electrically conductive control gate electrode near the floating gate electrode. The control gate electrode is insulated from the floating gate electrode. A sensor layer is formed by an electrically conductive further layer that is electrically conductively connected to the floating gate electrode. The control gate electrode is arranged outside a region that is located between the sensor layer and the surface provided for the incidence of ultraviolet radiation. The sensor layer is discharged by incident UV radiation and can be charged or discharged electrically by charging or discharging the floating gate electrode.

Growing community of inventors

Graz, Austria

Friedrich Peter Leisenberger