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San Jose, CA, United States of America

Friedrich Gunter Kurt Sendig

Average Co-Inventor Count = 3.23

ph-index = 2

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 14

Friedrich Gunter Kurt SendigDonald John Oriordan (4 patents)Friedrich Gunter Kurt SendigHsiang-Wen Jimmy Lin (4 patents)Friedrich Gunter Kurt SendigPhilippe Aubert McComber (2 patents)Friedrich Gunter Kurt SendigBarry Andrew Giffel (2 patents)Friedrich Gunter Kurt SendigJonathan Lee Sanders (2 patents)Friedrich Gunter Kurt SendigSalem Lee Ganzhorn (2 patents)Friedrich Gunter Kurt SendigMathieu Eric Drut (2 patents)Friedrich Gunter Kurt SendigJon Francis Bendicksen (1 patent)Friedrich Gunter Kurt SendigBulent Basaran (1 patent)Friedrich Gunter Kurt SendigFriedrich Gunter Kurt Sendig (7 patents)Donald John OriordanDonald John Oriordan (10 patents)Hsiang-Wen Jimmy LinHsiang-Wen Jimmy Lin (6 patents)Philippe Aubert McComberPhilippe Aubert McComber (8 patents)Barry Andrew GiffelBarry Andrew Giffel (7 patents)Jonathan Lee SandersJonathan Lee Sanders (6 patents)Salem Lee GanzhornSalem Lee Ganzhorn (6 patents)Mathieu Eric DrutMathieu Eric Drut (3 patents)Jon Francis BendicksenJon Francis Bendicksen (4 patents)Bulent BasaranBulent Basaran (2 patents)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Synopsys, Inc. (7 from 2,485 patents)


7 patents:

1. 10909300 - Creating and reusing customizable structured interconnects

2. 10528696 - Creating and reusing customizable structured interconnects

3. 10521535 - Reuse of extracted layout-dependent effects for circuit design using circuit stencils

4. 10380297 - Integrated circuit design using generation and instantiation of circuit stencils

5. 10275560 - Placement of circuit elements in regions with customized placement grids

6. 10102324 - Reuse of extracted layout-dependent effects for circuit design using circuit stencils

7. 10078715 - Integrated circuit design using generation and instantiation of circuit stencils

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12/5/2025
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