Koninklijke Philips Corporation N.V.

Nxp B.v.

Ampleon Netherlands B.v.

U.S. Philips Corporation

Technische Universiteit Delft

Freerk Van Rijs

Ronald Dekker

Jan Willem Slotboom

Petrus Hubertus Cornelis Magnee

Johannes Adrianus Maria De Boet

Iordan Konstantinov Sveshtarov

Youri Victorovitch Ponomarev

Henricus Godefridus Rafael Maas

Leonardus Cornelis Nicolaas De Vreede

Rob Mathijs Heeres

Doede Terpstra

Henricus G R Maas

Seyed Morteza Alavi

Stephan Jo Cecile Henri Theeuwen

Petra Christina Anna Hammes

Hendrik Gezienus Albert Huizing

Hendrikus Ferdinand Franciscus Jos

Mohammad Reza Beikmirza

Robert Jan Bootsman

Rob Heeres

Dave Michel Henrique Hartskeerl

Ivo Bernhard Pouwel

Petra C A Hammes

Stephan J C H Theeuwen

Alexander Otto Harm

An RF transmitter () having a gate-segmented power output stage () and a digital driver (). The gate-segmented power output stage () includes a field-effect transistor with a plurality of gate fingers () and drain fingers () that define a gate periphery. The field-effect transistor comprises a plurality of power output stage segments () that each correspond to a respective part of the gate periphery, and that each have a respective power output stage segment input (). The digital driver () has control outputs () which are connected to corresponding ones of the respective power output stage segment inputs (), and is configured for individually switching each of the power output stage segments () between an on mode and a cut-off mode in dependence of one or more input signals to obtain a modulated RF carrier signal at an output () of the gate-segmented power output stage ().

Digital transmitter with high power output

The present disclosure relates to a packaged radiofrequency (RF) power amplifier. The present disclosure further relates to a semiconductor die that is used in such a power amplifier and to an electronic device or system that comprises the semiconductor die and/or power amplifier. According to the disclosure, the semiconductor die comprises a second drain bond assembly arranged spaced apart from the first drain bond assembly and electrically connected thereto, wherein the second drain bond assembly is arranged closer to the input side of the semiconductor die than the first drain bond assembly. The RF power amplifier comprises a first plurality of bondwires which extend between the first drain bond assembly and the output lead, and a second plurality of bondwires which extend from the second drain bond assembly to a first terminal of a grounded capacitor.

Packaged RF power amplifier

The present disclosure relates to a radio frequency (RF) power transistor package. It further relates to a mobile telecommunications base station comprising such an RF power transistor package, and to an integrated passive die suitable for use in an RF power amplifier package. In example embodiments, an in-package impedance network is used that is connected to an output of the RF power transistor arranged inside the package. This network comprises a first inductive element having a first and second terminal, the first terminal being electrically connected to the output of the RF transistor, a resonance unit electrically connected to the second terminal of the first inductive element, and a second capacitive element electrically connected in between the resonance unit and ground, where the first capacitive element is arranged in series with the second capacitive element.

Integrated passive device for RF power amplifier package

System and method for compensating for changes in an output impedance of a power amplifier uses an impedance compensating circuit with an impedance inverter coupled to the power amplifier. The impedance inverter of the impedance compensating circuit is configured such that an output impedance of the impedance inverter is proportional to the inverse of the output impedance of the power amplifier to compensate for changes in the output impedance of the power amplifier.

System and method for compensating for changes in an output impedance of a power amplifier

The LDMOS transistor () of the invention comprises a source region (), a channel region (), a drain extension region () and a gate electrode (). The LDMOS transistor () further comprises a first gate oxide layer () and a second gate oxide layer (), which is thicker than the first gate oxide layer (). The first gate oxide layer () at least extends over a first portion of the channel region (), which is adjacent to the source region (). The second gate oxide layer () extends over a region where a local maximum (A, B) of the electric field (E) generates hot carriers thereby reducing the impact of the hot carriers and reducing the Idq-degradation. In another embodiment the second gate oxide layer () extends over a second portion of the channel region (), which mutually connects the drain extension region () and the first portion of the channel region (), thereby improving the linear efficiency of the LDMOS transistor ().

LDMOS transistor

The LDMOS transistor () of the invention is provided with a stepped shield structure () and/or with a first () and a second () drain extension region having a higher dopant concentration than the second drain extension region, and being covered by the shield.

Electric device comprising an LDMOS transistor

Protection diode for improved ruggedness of a radio frequency power transistor and self-defining method to manufacture such protection diode

The invention relates to an essentially discrete semiconductor device comprising a semiconductor body ( ) having a first, preferably bipolar, transistor (T ) with a first region ( ) forming a collector ( ) of T , and a second, preferably also bipolar, transistor (T ) with a second region ( ) forming a collector ( ) of T , which transistors (T , T ) are in a cascode configuration wherein the collector ( ) of T is connected to the emitter ( ) of T . Such a device cannot suitably be used in a base station for mobile communication. According to the invention, the first region ( ) and the second region ( ) are positioned next to each other within a semiconductor region ( ), a part of which situated below the first region ( ) is provided with a higher doping concentration at the location of T . In this way, T has a low collector-emitter breakdown voltage and a high cutoff frequency, whereas for T said voltage and frequency are, respectively, high(er) and low(er). The resultant device is very suitable, on the one hand, for a high voltage application, for example 28 V, and a high power application, for example 100 W and, on the other hand, the device can still operate at a very high speed and hence is very suitable for the above application. Moreover, the device can be manufactured very easily using a method according to the invention. Preferably, the device is rendered suitable for surface mounting, and the semiconductor body is attached to an isolating substrate ( ), while the parts thereof that are situated outside T and T are removed.

Semiconductor device and method of manufacturing same

The invention relates to a semiconductor device ( ) with a semiconductor body ( ) comprising at least one semiconductor element (H) with an active area (A) and a coil ( ) coupled to said element (H). The coil ( ) and a further coil ( ) jointly form a transformer (F). The semiconductor body ( ) is secured to a carrier plate ( ) which comprises an electrically insulating material and is covered with a conductor track ( ). According to the invention, the further coil ( ) is positioned on the carrier plate ( ) and is formed by the conductor track ( ) and electrically separated from the coil ( ). In this way, a-device ( ) is obtained which is easier to manufacture than the known device. Moreover, the communication between the element (H) and the outside world does not involve an electrical coupling and hence, for example, bonding wires, are not necessary. The invention is particularly advantageous for a (discrete) bipolar transistor, which can suitably be used for surface mounting. The invention further comprises an easy method of manufacturing a device ( ) according to the invention.

Semiconductor elements for semiconductor device

A method of manufacturing a semiconductor device comprising heterojunction bipolar transistors (HBTs), in which method a first semiconductor layer of monocrystalline silicon ( ), a second semiconductor layer of monocrystalline silicon comprising 5 to 25 at. % germanium ( ) and a third semiconductor layer of monocrystalline silicon ( ) are successively provided on a surface ( ) of a silicon wafer ( ) by means of epitaxial deposition. Base zones of the transistors are formed in the second semiconductor layer. In this method, the second semiconductor layer is deposited without a base doping, said doping being formed at a later stage. Said doping can be formed by means of an ion implantation process or a VPD (Vapor Phase Doping) process. This method enables integrated circuits comprising npn-transistors as well as pnp-transistors to be manufactured.

Method of manufacturing a semiconductor device comprising SiGe HBTs

The invention relates to a semiconductor device comprising a bipolar transistor having a collector ( ), a base ( ) and an emitter ( ) at its active area (A). The semiconductor body ( ) of the device is covered with an insulating layer ( ). At least a part of a base connection conductor ( ) and an emitter connection conductor ( ) extend over the insulating layer ( ) and lead to a base connection area ( ) and an emitter connection area ( ), respectively. The known transistor is characterized by poor gain, particularly at high frequencies and at high power. A device according to the invention is characterized in that the emitter connection area ( ) and the base connection area ( ), viewed in projection, are present on the same side of the active area (A), the emitter connection conductor ( ) is divided into two or more sub-conductors ( A, B) and the base connection conductor ( ) is divided into one or more further sub-conductors ( ) which are present between the sub-conductors ( A, B) and form a co-planar transmission line (T) therewith. In this way, the inductance of the emitter connection conductor ( ) is reduced considerably, resulting in a much higher gain, particularly at high frequencies and high power. Preferably, the semiconductor body (A) is interrupted at the area of the transmission line (T) and is glued to an insulating substrate ( ).

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Nijmegen, Netherlands

Freerk Van Rijs