International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Freeman Leigh Rawson, Iii

Malcolm Scott Ware

Karthick Rajamani

Charles Robert Lefurgy

Elmootazbellah Nabil Elnozahy

Heather Lynn Hanson

Ramakrishnan Rajamony

Michael Stephen Floyd

Naresh Nayar

Andrew J Geissler

Soraya Ghiasi

Hye-Young McCreary

Thomas M Brey

Thomas W Keller, Jr

Bishop Chapman Brock

Andreas Bieswanger

Guy G Sotomayor, Jr

Richard Loise Arndt

Juan C Rubio

Ronald Lynn Rockhold

Eli Chiprout

Randal Craig Swanberg

John Bruce Carter

Ajay Dholakia

Sumeet Kochar

Wesley Michael Felter

Eric Van Hensbergen

Raymond J Harrington

Christopher Francois

Ryuji Orita

David Brian Glasco

Wei T Huang

Malcolm Scott Allen-Ware

Patrick Joseph Bohrer

Michael D Kistler

James Lyle Peterson

Kshitij Sudan

James Michael Magee

Ramakrishna Kotla

Jente Benedict Kuang

Ching-Yun Chao

Gary Dale Carpenter

Richard Louis Arndt

Ravindranath Kokku

Lixin Zhang

William Evan Speight

Guillermo Jesus Silva

Todd Jon Rosedahl

Sriram Govindan

Steven Paul Hartman

Alexandre Peixoto Ferreira

Stefanie Ruth Chiras

Thomas Walter Keller

Hardeep Singh

Anthony N Hylick

Ravindranath Kasinath Manikundalam

Hye-Young McCreary, Iii

Anupam Chanda

Elmootazebllah Nabil Elinozahy

Edward M Tuggle, Jr

Charles Chuldoo Jung

Gary Lee Barton

David Barnett Golub

Karthik Rajamani

Christopher Dean Youngworth

A method, system, and computer usable program product for improved register allocation in a simultaneous multithreaded processor. A determination is made that a thread of an application in the data processing environment needs more physical registers than are available to allocate to the thread. The thread is configured to utilize a logical register that is mapped to a memory register. The thread is executed utilizing the physical registers and the memory registers.

Register allocation to threads

A method for managing energy. A processor unit identifies a plurality of groups of virtual machines in a computer system. The processor unit allocates the energy in the computer system to the plurality of groups of virtual machines based on a policy.

Energy allocation to groups of virtual machines

An embodiment of a system for managing energy identifies a plurality of groups of virtual machines in a computer system and allocates the energy in the computer system for a next time interval to a plurality of groups of virtual machines based on an energy budget and a policy selected from a set of policies in conjunction with a minimum energy, a group priority and a virtual machine priority.

A partition that is executed by multiple processing nodes. Each node includes multiple cores and each of the cores has a frequency that can be set. A first frequency range is provided to the cores. Each core, when executing the identified partition, sets its frequency within the first frequency range. Frequency metrics are gathered from the cores running the partition by the nodes. The gathered frequency metrics are received and analyzed by a hypervisor that determines a second frequency range to use for the partition, with the second frequency range being different from the first frequency range. The second frequency range is provided to the cores at the nodes executing the identified partition. When the cores execute the identified partition, they use a frequencies within the second frequency range.

Partition level power management using fully asynchronous cores with software that has limited asynchronous support

A method, system, and computer program product for reducing power and energy consumption in a server system with multiple processor cores is disclosed. The system may include an operating system for scheduling user workloads among a processor pool. The processor pool may include active licensed processor cores and inactive unlicensed processor cores. The method and computer program product may reduce power and energy consumption by including steps and sets of instructions activating spare cores and adjusting the operating frequency of processor cores, including the newly activated spare cores to provide equivalent computing resources as the original licensed cores operating at a specified clock frequency.

Method of exploiting spare processors to reduce energy consumption

A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction.

Asynchronous persistent stores for transactions

A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.

Controlling depth and latency of exit of a virtual processor's idle state in a power management environment

A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.

Priority-based power capping in data processing systems

A mechanism is provided in a data processing system for optimization of a distributed file system by log data analysis. A name node in the distributed file system initiates a log analysis map/reduce job on one or more connected data nodes via a map/reduce processing framework in the distributed file system and receives result data resulting from the log analysis map/reduce job from the one or more connected data nodes via the map/reduce processing framework in the distributed file system. The name node performs analysis on the received result data and generates an optimization plan for the one or more connected data nodes based on results of the analysis. The name node initiates the optimization plan on the one or more connected data nodes via the map/reduce processing framework in the distributed file system.

File system optimization by log/metadata analysis

A method for a framework for scheduling tasks in a multi-core processor or multiprocessor system is provided in the illustrative embodiments. A thread is selected according to an order in a scheduling discipline, the thread being a thread of an application executing in the data processing system, the thread forming the leader thread in a bundle of threads. A value of a core attribute in a set of core attributes is determined according to a corresponding thread attribute in a set of thread attributes associated with the leader thread. A determination is made whether a second thread can be added to the bundle such that the bundle including the second thread will satisfy a policy. If the determining is affirmative, the second thread is added to the bundle. The bundle is scheduled for execution using a core of the multi-core processor.

Framework for scheduling multicore processors

Mechanisms for dynamically managing core pools are provided. The mechanisms measure the amount of a computational load on a computing device. One way of measuring the load may consist of executing a number of instructions, in a unit of time, with numerous cores of the computing device. The mechanisms compare the number of instructions executed with specific thresholds. Depending on whether the number of instructions is higher or lower than the thresholds, the computing devices may respond by activating and deactivating cores of the computing devices. By limiting execution of instructions of the computing device to a smaller number of cores and switching one or more cores to a lower power state, the devices may conserve power.

Dynamic core pool management

A method, system, and computer program product for dynamic management of thermal load in a data processing system are provided in the illustrative embodiments. A component of the data processing system is identified whose temperature has reached a temperature threshold, the component forming a critical component. A workload is selected from a set of workloads that is using the critical component. The workload is modified such that work performed by the critical component is reduced, the modifying further causing the temperature of the critical component to reduce below the temperature threshold. A power consumption of a cooling system associated with the thermal zone is reduced responsive to the temperature reducing below the temperature threshold.

Management of thermal condition in a data processing system by dynamic management of thermal loads

A system, and computer program product for increasing a capacity of a memory are provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.

Increasing memory capacity in power-constrained systems

A method for increasing a capacity of a memory is provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.

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Austin, TX, United States of America

Freeman Leigh Rawson, Iii