Bell Telephone Laboratories

At&t Bell Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

American Telephone and Telegraph, Co.

Frederick W Ostermayer, Jr

Paul A Kohl

Catherine Wolowodiuk

Reginald R Buckley

Thomas L Koch

Jean-Marc Verdiell

Alastair M Glass

Lucian Arthur D'Asaro

Donald M Tennant

Tien P Lee

Charles A Burrus, Jr

Randolph H Burton

Milton Everett Terry

Richard M Lum

Becky Thomas Kerns

Lee Graves McKnight

Walter Logan

A technique is disclosed for utilizing direct-write electron-beam photolithography and holographic optical exposure to form gratings in optoelectronic structures. The direct-write e-beam process is used to form rectangular grating teeth in a mask substrate, where the mask is then used as a phase mask to transfer the pattern to the optoelectronic device. Advantageously, the utilization of a direct write e-beam technique to form the grating pattern on the photomask allows for the formation of any desired number and location of abrupt phase shifts, multiple grating pitches, alignment fiducials, and any other desired features. Therefore, a single exposure of the direct write e-beam mask allows for a plurality of different grating patterns to be simultaneously printed.

Grating fabrication using electron beam lithography

A process is described for making semiconductor lasers with cleaved facets for end mirrors. The process involves electrochemically photoetching slots with deep, narrow cross-sections in a wafer and applying stress to cleave the wafer in the desired place. Extremely short and reproducible semiconductor lasers can be made by this procedure (less than 50 or even 25 .mu.m) which yields extremely useful semiconductor lasers particularly for communication applications. Also, the procedure requires a minimum of skill to produce excellent quality cleaved semiconductor lasers (including short-length lasers) with high yields.

Fabrication of cleaved semiconductor lasers

A photoelectrochemical etching process is described for producing gratings in various semiconductors. Because this is a direct, single step process, extreme uniformity is obtained over a wide area. The procedure is particularly useful for mode reflection in distributed feedback lasers.

Process of producing devices with photoelectrochemically produced

A process is described for photoelectrochemically etching n-type gallium arsenide and closely related compound semiconductors such as gallium aluminum arsenide and gallium arsenide phosphide. Such a process is advantageous because the etching is confined to where light is incident to the surface of the semiconductor. In addition, the shape of the configuration etched out of the semiconductor can be controlled by the light incident on the surface of the semiconductor. For example, undercutting can be minimized by use of parallel rays incident on the surface of the semiconductor to be etched.

Photoelectrochemical etching of n-type gallium arsenide

An etching process is described which can etch geometrical shapes on the surface of an n-type or intrinsic compound semiconductor and yield surfaces of optical quality without further processing. The etching process is an electrochemical process where etching is proportional to light intensity. The process involves applying a potential to the compound semiconductor while immersed in an electrolytic solution and irradiating the surface to be etched with light in a certain energy range. The electrolytic solution contains hydrofluoric acid. The distribution of light intensity and ray direction is selected to produce the desired geometrical shape. Particularly advantageous is that the surfaces produced are of optical quality. For example, lenses produced by the etching process exhibit surfaces of optical quality. Further, the process can be carried out on all the lenses on a wafer simultaneously without attention to individual devices. This is highly desirable economically. Also, the lenses produced are integral parts of the light emitting diode.

Etching of optical surfaces

A photoelectrochemical process is described for anisotropic etching of intrinsic III-V compound semiconductors. Such a process is highly advantageous because the etching takes place only where light is incident on the surface of the semiconductor. Thus, various patterns can be etched into the semiconductor surface without the use of a mask, undercutting is minimized where masks are used and the shape of the hole etched out of the surface can be controlled.

Photoelectrochemical processing of III-V semiconductors

A process is described for plating gold on metal surfaces electrically attached to a compound semiconductor. The procedure is particularly valuable where gold is to be in small holes or crevices in semiconductor structure since electroplating on the semiconductor surface is avoided. The process is useful for providing low inductance electrical connection to various parts of semiconductor devices such as to the source in gallium arsenide field-effect transistors.

Photoelectrochemical gold plating process

A mask structure is described which is extremely useful for use in various photoetching processes where etching rate depends on radiation intensity on the etched surface. Such processes are extremely useful for producing various geometrical patterns on surfaces. The mask is made up of alternate areas of opaque and transparent areas which when introduced into an optical imaging system ordinary aberrations produce a pattern on the surface to be etched with the desired continuous spatial variation of radiation intensity. A particular advantage of the mask structure is that it can easily be made using an Electron Beam Exposure System. The mask is particularly useful for electrochemical photoetching processes carried out on compound semiconductors. The mask structure is usefully used to photoetch integral lenses on light emitting diodes. This photoetching process produces a variety of lens structures on LED devices with great accuracy. Also, a large array of lens structures are produced simultaneously which is highly advantageous economically.

Mask structures for photoetching procedures

A process is described for photoelectrochemically etching n-type indium phosphide and closely related compound semiconductors such as indium gallium arsenide and indium gallium arsenide phosphide. Such a process is advantageous because the etching is confined to where light is incident to the surface of the semiconductor. In addition, the shape of the configuration etched out of the semiconductor can be controlled by the light incident on the surface of the semiconductor. For example, undercutting can be minimized by use of parallel rays incident on the surface of the semiconductor to be etched.

Photoelectrochemical processing of InP-type devices

A process is described for etching p-type semiconductors using a photoelectrochemical etching process. This etching process is highly advantageous because the etching site is highly defined by the incident light and the etching rate can be controlled in a number of ways including light intensity and electrode potential.

Photoelectrochemical etching of semiconductors

Gold plated surfaces are inspected by means of reflected light in the wavelength range of 450 to 575 nanometers to give a sensitive indication of surface conditions. This test automates the visual inspection for 'brown gold' and is advantageously used in continuous strip gold plating operations. The technique may be used as a quality control check or as a process control to correct non-optimum process parameters that lead to degradation of gold surface conditions. In a preferred embodiment, the reflected light from the surface being inspected is compared with light reflected from a reference surface. Alternately, a separate wavelength band, typically 700 to 800 nanometers, is reflected from the surface being inspected and compared to the reflected light in the 450 to 575 nanometer wavelength band.

Optical inspection of gold surfaces

Much electrical equipment, such as telephone station apparatus, exposed to occasional, destructively high, voltage surges (e.g., lightning strikes) is protected by a device, placed in parallel with the equipment. This device includes two electrodes defining a fixed narrow spark gap. Such a device is designed to arc over with each surge, shorting the destructive energy to ground, and to recover afterward, restoring the line to its original condition. The predominant failure mode of such devices is the occurrence of a permanant short across the narrow gap, due to electrode damage produced during the protective arcing mode. In the disclosed devices, the electrodes bound an annular narrow gap region, determining the protective breakdown voltage, and a central wider gap region, sustaining the major part of the electrode damage. Shortly after the initiation of the protective discharge in the narrow gap region, the discharge is forced into the wider gap region by the provision, in at least one of the electrodes, of a high resistance carbonaceous material at the annular narrow gap region and a lower resistance metallic material at the central wider gap region. Since the major portion of electrode damage is sustained by the wider gap region of the electrodes, the incidence of shorting failure is suppressed.

Growing community of inventors

Chatham, NJ, United States of America

Frederick W Ostermayer, Jr