Stmicroelectronics Gmbh

Frederick Ray Gomez

Jefferson Sismundo Talledo

Tito Mangaoang

Ela Mia Cadag

Aaron Cadag

Rammil Seguido

Emmanuel Angeles

Generally described, one or more embodiments are directed to semiconductor packages comprising a plurality of leads and methods of forming same. The plurality of leads include active leads that are electrically coupled to bond pads of a semiconductor die and thereby coupled to active components of the semiconductor die, and inactive leads that are not electrically coupled to bond pads of the semiconductor die. The active leads have surfaces that are exposed at a lower surface of the semiconductor package and forms lands, while the inactive leads are not exposed at the lower surface of the package.

Lead stabilization in semiconductor packages

Embodiments of the present disclosure are directed to a leadframe package with recesses formed in outer surface of the leads. The recesses are filled with a filler material, such as solder. The filler material in the recesses provides a wetable surface for filler material, such as solder, to adhere to during mounting of the package to another device, such as a printed circuit board (PCB). This enables strong solder joints between the leads of the package and the PCB. It also enables improved visual inspection of the solder joints after the package has been mounted.

Leadframe package with pre-applied filler material

According to principles of the disclosure as explained herein, selected leads are electrically connected through metal strips to the lead frame until the end of the manufacturing process. The lead frame is grounded through the manufacturing process to prevent any ESD event from causing damage to the protected leads. In the final singulation step, the leads are electrically isolated from each other and from the lead frame, thus maintaining protection from a potential ESD event up until the final package singulation step.

Protection from ESD during the manufacturing process of semiconductor chips

Delamination of stacked integrated circuit die configurations on printed circuit boards is avoided by providing a metal trace support structure underneath the die stack. The metal trace support structure features substantially equally spaced thin metal traces in place of a contiguous metal plate which has been used in the past. Spaced apart thin metal traces are less vulnerable to thermal expansion than a metal plate which has a large thermal mass. The metal traces still provide structural stability, while preventing delamination of the die stack configuration during thermal processing. A method of attaching a bridge die stack configuration to a printed circuit board by adhering a die attach film to a field of metal traces is demonstrated. In addition, the electrical and structural integrity of the bridge die stack formed with a metal trace support structure is confirmed with test results.

Growing community of inventors

Calamba, Philippines

Frederick Ray Gomez