International Business Machines Corporation

Frederick R Christie

Kostas I Papathomas

David W Wang

Jonathan David Reid

Mark David Poliks

William J Summa

Ashit A Mehta

William H Lawrence

Lawrence R Daley

John M Brauer

Solder interconnection encapsulant, encapsulated structure and method for its fabrication and use, whereby the gap created by solder connections between a carrier substrate and a semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler, e.g., an aluminum nitride or aluminum oxide filler, having a maximum particle size of 31 microns.

Solder interconnection structure and process for making

Compositions containing bisphenol M dicyanate, prepolymer thereof, or mixtures thereof, and 4,4'-ethylidene bisphenol dicyanate, prepolymer thereof or mixtures thereof; and filler having maximum particle size of 20 microns and being substantially free of alpha particle emissions. The compositions are useful in forming interconnection structures for forming an integrated semiconductor device to a carrier substrate.

Solder interconnection from a composition containing a mixture of

Solder interconnection whereby the gap created by solder connections between a carrier substrate and semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler having a maximum particle size of 31 microns and being at least substantially free of alpha particle emissions.

Solder interconnection structure

Composition and solder interconnection structure for its use, wherein the gap created by solder connections between a carrier substrate and a semiconductor chip device mounted thereon is filled with the solvent free formulation obtained by curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof, polyol, and filler which is substantially free of alpha particle emissions.

Dielectric composition and solder interconnection structure for its use

Disclosed is a method of fabricating a multilayer electronic circuit package. The multilayer circuit package has at least one layer that is a circuitized, polymer encapsulated metal core. According to the method of the invention a metal foil is provided for the metal core of the layer. This metal core foil may be provided as a single unit or in a continuous, roll to roll, process. The vias and through holes are drilled, etched, or punched through the metal foil. An adhesion promoter is then applied to the perforate metal foil for subsequent adhesion of polymer to the foil. The dielectric polymer is then applied to the perforate metal foil core by vapor depositing, chemical vapor depositing, spraying or electrophoretically depositing, a thermally processable dielectric polymer or precursor thereof onto exposed surfaces of the perforate metal foil including the walls of the through holes and vias. The dielectric polymer or precursor thereof is then thermally processed to form a conformal dielectric, polymeric coating on surfaces of the perforate metal foil, including the interior surfaces of the vias and through holes. This dielectric, polymeric coating may then be circuitized, and coated with an adhesive for lamination to the next adjacent layer. After lamination, one or more chips are attached to the completed package.

Method for fabricating metal core layers for a multi-layer circuit board

A composition suitable for making circuit boards containing a bismaleimide triazine polymeric component, a brominated epoxy polymeric component, and a solvent is provided.

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Endicott, NY, United States of America

Frederick R Christie