Texas Instruments Corporation

Inria Institut National De Recherche En Informatique Et En Automatique

Texas Instruments France

Frédéric Parain

Gerard Chauvel

Serge Bernard Lasserre

Gilbert Cabillic

Jean-Philippe Lesot

Dominique D'Inverno

Jean-Paul Routeau

Maija Kristiina Kuusela

Michel Banâtre

Salam Majoul

Michel P Banatre

Teresa Higuera

Valerie Issarny

Jean Philippe Lesot

A mobile device () manages tasks () using a scheduler () for scheduling tasks on multiple processors (). To conserve energy, the set of tasks to be scheduled are divided into two (or more) subsets, which are scheduled according to different procedures. In a specific embodiment, the first subset contains tasks with the highest energy consumption deviation based on the processor that executes the task. This subset is scheduled according to a power-aware procedure for scheduling tasks primarily based on energy consumption criteria. If there is no failure, the second subset is scheduled according to a real-time constrained procedure that schedules tasks primarily based on the deadlines associated with the various tasks in the second subset. If there is a failure in either procedure, one or more tasks with the lowest energy consumption deviation are moved from the first subset to the second subset and the scheduling is repeated.

Energy-aware scheduling of application execution

A method for generating program code for translating high level code into instructions for one of a plurality of target processors comprises first determining a desired program code characteristic corresponding to a target processor. Then, selecting one or more predefined program code modules from a plurality of available program code modules in accordance with said desired program code characteristic, and generating program code for translating high level code into instructions for said target processor from said selected one or more predefined program code modules. Preferably, the method comprises forming agglomerated program code from a plurality of program code modules in accordance with said desired program code characteristic.

Data processing apparatus, system and method

An electronic system comprises a processor, memory coupled to the processor, and an application programming interface that causes an embedded garbage collection object to be active. The memory stores one or more objects that selectively have references from root objects. The embedded garbage collection object preferably uses control data to cause objects to be removed from said memory, the removed objects comprise those objects that were created while an embedded garbage collection object was active and that do not have references from root objects.

Embedded garbage collection

In some embodiments, a storage medium comprises application software that performs one or more operations and that directly manages a device. The application software comprises instructions that initialize an application data structure (e.g., an object or array) usable by the application software to manage the device and also comprises instructions that map the application data structure to a memory associated with the device without the use of a device driver. In other embodiments, a method comprises initializing an application data structure to manage a hardware device and mapping the application data structure to a memory associated with the hardware device without the use of a device driver. The application data structure may store a single dimensional data structure or a multi-dimensional data structure. In some embodiments, the device being managed by the application software may comprise a display and the application software may comprise Java code.

Accessing device driver memory in programming language representation

A process and associated system comprise pre-allocating a portion of memory in a first processor based upon a control input and determining in a second processor if the portion of the pre-allocated memory can satisfy a memory allocation request. Further, if a portion of pre-allocated memory can satisfy a memory allocation request, the technique includes assigning the pre-allocated portion of memory to the allocation request. However, if a portion of pre-allocated memory cannot satisfy a memory allocation request, the technique includes allocating a portion of memory in the first processor to the allocation request.

Memory allocation in a multi-processor system

A method is disclosed that comprises determining whether a data subsystem is to operate as cache memory or as scratchpad memory in which line fetches from external memory are suppressed and programming a control bit to cause the data subsystem to be operated as either a cache or scratchpad memory depending on the determination. Other embodiments are disclosed herein as well.

Growing community of inventors

Rennes, France

Frédéric Parain