Nxp Usa, Inc.

Motorola Corporation

Fred Reece Clayton

Bruce McRae Green

Bernhard Grote

Darrell Glenn Hill

Alan J Magnus

Kelly Wayne Kyler

James Allen Teplik

Jaeshin Cho

Lawrence Scott Klingbeil

Yuanzheng Yue

Anthony Ciancio

Congyong Zhu

Craig L Jasper

David Robert Currier

James H Williams

Warren Crapse

Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a gate electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.

Transistors with source-connected field plates

A method of making a semiconductor device is provided for depositing, patterning, and developing photoresist () on an underlying layer located on a backside of a wafer having a frontside on which an integrated circuit die are formed over a shared wafer semiconductor substrate and arranged in a grid, thereby forming a patterned photoresist mask with a unique set of one or more openings which are used to selectively etch the underlying layer to form, on each integrated circuit die, a unique die mark identifier pattern of etched openings in the underlying layer corresponding to the unique set of one or more openings in the patterned photoresist mask (), where the patterned photoresist mask is removed () from the backside of the wafer before singulating the wafer to form a plurality of integrated circuit devices () which each include a unique die marking.

Using a backside mask layer for forming a unique die mark identifier pattern

A device includes a substrate, an insulating layer that includes an etch stop layer formed over an upper surface of the substrate, a first conductive region formed over the insulating layer, and an opening formed within the substrate that extends from a lower surface of the substrate, through the upper surface of the substrate, and through at least a portion the insulating layer, terminating on the first conductive region. A method for forming the device includes forming the substrate, forming the insulating layer that includes the etch stop layer over the upper surface of the substrate, forming a first conductive region over the insulating layer; and forming an opening within the substrate that extends from the lower surface of the substrate, through the upper surface of the substrate, and through at least a portion the insulating layer, terminating on the first conductive region formed over the insulating layer.

Device with an etch stop layer and method therefor

A process for improving uniformity across the surface of a substrate during a plasma process such as plasma etching. A conductive plane is formed at the back surface of the substrate. A plasma process is then performed to the front surface of the substrate. The conductive plane may then be removed upon completion of the plasma process and before final processing steps.

Plasma processing method

Growing community of inventors

Mesa, AZ, United States of America

Fred Reece Clayton