Siemens Aktiengesellschaft

Fred Matthiesen

Matthias Schoebinger

Bernd Zehner

Ulrich Totzek

Hans J Mattausch

Hans-Juergen Mattausch

An arrangement for DPCM coding with high data rate. In a DPCM coder, wherein respective prediction values (s) are subtracted from digitized picture element signals (s), the difference signals that result represent the prediction error .DELTA. supplied to a circuit element for cutputting a quantization error (11) pertaining to a difference signal. In a following adder, quantization errors (q) are added to the prediction errors (.DELTA.), whereby the quantized prediction error (.DELTA.q) can be taken at the output of the following adder. For forming the reconstructed picture element signal (s.sub.R), the quantization error (q) is added to the current picture element signal (s) in a first adder and is supplied to a first subtraction means via a predictor. In an embodiment of the circuit, a DPCM structure that has a shortest possible critical path for a DPCM structure that is composed of a quantizer, of an addition and of a register can be produced by dividing the predictor upon insertion or removal of individual registers.

Arrangement for DPCM-coding with high data rate

An arrangement for DPCM-coding of video signals. A DPCM coder wherein estimated values (s) are respectively subtracted from digitized picture element signals (s) and the estimated errors are used for signal transmission after quantization and coding. Every estimated value (s) is derived from a reconstructed picture element signal formed in an adder. A limiter between the first adder and the subtractor that reduces the calculating speed can be removed from the time-critical path in that the limiter function is distributed onto two paths that calculate in parallel. A subtraction of the signal taken at the adder output occurs in the one path; the subtraction of an upper or lower limit value (.alpha..multidot.G.sup.-, .alpha..multidot.G.sup.+) weighed with .alpha. and through-connected via a switch from the respective picture element signal (s) of the input side is carried out on the other path. An overflow recognition element and a multiplexer provide that only a difference of the two differences formed up to this point, that relate to the actual addition result (no overflow, positive overflow, negative overflow), is through-connected to a quantizer.

Arrangement for DPCM-coding of video signals

In DPCM coders, respective estimated values are subtracted from digitized picture element signals and the estimated errors are employed for signal transmission following quantization and coding. Each estimated error is quantized with a fictitious, positive operational sign in a first programmable logic arrangement and, parallel thereto, is quantized with a fictitious negative operational sign in a second programmable logic arrangement. Of these two quantizing results, the correct result is selected via a multiplexer controlled by the actual operational sign of the estimated error.

Arrangement for DPCM coding of television signals with fast signal

In a DPCM coder respective estimated values are subtracted from digitized picture element signals and estimated errors are used for signal transmission after quantization and coding. Each estimated value is derived from a reconstructed picture element signal formed in an adder. Separate, simultaneous subtractions of the signal taken at the output of the adder, as well as of the positive and negative adder limit values, from the respective picture element signal at the input thereby occur, whereby an overflow recognition device and a multiplexer provide that only the difference from the three differences formed up to this point are taken into consideration for quantization on the basis of the actual addition result, including no overflow, positive overflow and negative overflow.

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Munich, Germany

Fred Matthiesen