Texas Instruments Incorporated Deutschland, Gmbh

Texas Instruments Corporation

Franz Prexl

Juergen Neuhaeusler

Wolfgang Steinhagen

Kevin Scoones

Ralph Oberhuber

Anmol Sharma

Erich Bayer

Horst Diewald

Gerhard Thiele

Stefan Reithmaier

Erich-Johann Bayer

Horst Ziegler

Thomas Keller

Kaiser Ulrich

Mariangela De Martino

Frank R Fattori

Eric-Johann Bayer

The present disclosure provides for a processing element configured to couple to a first ramp generator and a second ramp generator and control the first ramp generator while a power converter is operating in a buck-boost mode of operation to generate a first ramp signal beginning at a first value and increasing to a second value during a first clock cycle and generate the first ramp signal beginning at the first value and increasing to a third value during a second clock cycle following the first clock cycle and control the second ramp generator while the power converter is operating in the buck-boost mode of operation to generate a second ramp signal beginning at a fourth value and decreasing to a fifth value during the first clock cycle and generate the second ramp signal beginning at the fourth value and decreasing to a sixth value during the second clock cycle.

Fixed frequency buck-boost power converter control

A circuit, comprising a trapezoidal generator that comprises digital logic configured to couple at a first input to a loop controller and at a second input to a buck-boost region detector and a driver coupled to an output of the digital logic and configured to couple to at least one power transistor of a power converter.

Power converter controller

One example includes a power converter system. The system includes a switching circuit configured to activate at least one power supply switch in response to a driver signal to provide an output voltage at an output based on an input voltage at an input and based on an inductor current associated with an inductor. The at least one power supply switch includes a parasitic diode that interconnects the inductor and the output. The system also includes a short-circuit protection system configured to detect a short-circuit condition and to deactivate the at least one power supply switch in response to the detection of the short-circuit condition to provide the inductor current from the inductor to the output through the parasitic diode in response to the deactivation of the at least one power supply switch.

Short-circuit protection system for power converters

An average current mode buck-boost DC to DC converter has a buck stage coupled between an input voltage source terminal and an output terminal. A boost stage is coupled between the input voltage source terminal and the output terminal. A current ramp control circuit generates a ramp signal for driving the buck and boost stages, the ramp signals being coupled to the buck and boost stages. A constant voltage related to the desired output voltage by a constant is applied directly to both a voltage control feedback loop for adjusting the output voltage and directly to an input to the current ramp control circuit, whereby the output voltage can be shifted from one voltage to another by feedforward control.

Electronic device for average current mode DC-DC conversion

An electronic device for DC-DC conversion of an input voltage into an output voltage is provided. The electronic device includes a current mode control loop for controlling a sensed current of the DC-DC conversion by comparing a voltage level indicating a magnitude of the sensed current with a reference voltage level indicating the maximum admissible magnitude of the sensed current. The reference voltage level is dynamically adjusted in response to a change of an input voltage level.

Electronic device and method for DC-DC conversion

An electronic device includes circuitry for driving a light-emitting diode (LED) or other light-emitting semiconductor device. The circuitry includes a first switch (NM) coupled with the light-emitting semiconductor device (LED) for switching a current (I) through the light-emitting semiconductor device (LED); a sensing means (R) for sensing a magnitude of the current (I) and outputting a respective sensing signal (SEN); an error amplifier (AMP) for receiving the sensing signal (SEN) and a target value (ISET) for the current (I) for providing a first control voltage (VG) based on the deviation of the actually sensed current magnitude and the current target value (ISET); a lowpass filter coupled to the error amplifier (AMP) for filtering the first control voltage (VG) and providing a second control voltage (VG); a voltage follower (NM) coupled to the lowpass filter and the first switch for receiving the second control voltage (VG) and providing a third control voltage (VG) for controlling the first switch's (NM) switching activity; and a second switch (PM, NM) for switching a supply current (IDS) of the voltage follower (NM) for switching the voltage follower (NM) on and off.

Light-emitting semiconductor device driver and method

An electronic device is provided comprising a driver for light emitting semiconductor devices. The driver includes a first MOS transistor (MN) coupled with a channel to the light emitting semiconductor device at an output node. The first MOS transistor (MN) is configured to determine a current through the light emitting semiconductor device (LED). A control loop is provided so as to control the first MOS transistor to maintain the magnitude of the current through the light emitting semiconductor device at a target value when a voltage drop across the first MOS transistor (MN) changes. A second MOS transistor is coupled to the output node and biased so as to supply an auxiliary current to the output node, when the voltage drop across the first MOS transistor drops below a minimum voltage level and a feedback loop is provided to reduce the current through the light emitting semiconductor device by an amount proportional to the auxiliary current.

Driver for light emitting semiconductor device

A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.

Control circuit for a polarity inverting buck-boost DC-DC converter

A buck-boost DC/DC converter includes an inductor and a power stage having a set of switches selectively connecting the inductor between a voltage input, a voltage output and a reference level in accordance with buck or boost mode. The converter has a switch control providing control signals to the set of switches in the power stage. A comparator provides to the switch control a first pulse width modulation signal in buck mode and a second pulse width modulation signal in boost mode. A ramp generator provides to the comparator a first ramp signal for buck mode and a second ramp signal for boost mode. An overlap control provides a ramp shift signal to the ramp generator in response to a detection signal that indicates activity of the switches in the power stage. The ramp shift signal adjusts the first and second ramp signals relative to each other so as to minimize any gap and any overlap between the first and second ramp signals. Whenever actuation of all switches in the power stage within the same clock period is detected, the ramp signals are adjusted in a way to reduce the overlap between the ramp signals. Conversely, when no switch activity is detected in a clock period, the ramp signals are adjusted in a waye to increase the overlap between the ramp signals. As a result, when the input voltage is close to the output voltage, the converter alternatively operates in buck mode or in boost mode, avoiding a buck-boost mode.

Buck-boost DC/DC converter with overlap control using ramp shift signal

An integrated circuit including a precharge circuit for a DC/DC boost converter which includes a reference current circuit with a MOSFET transistor (MP) that has a gate connected with the gate of the DC/DC boost converter's power MOSFET transistor (MP) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP) and at the MOSFET transistor (MP) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP) due to precharging load capacitance, in a sense to keep the precharge current through the power MOSFET transistor (MP) constant.

Precharge circuit for DC/DC boost converter startup

A DC&#x2014;DC CMOS converter including when the supply voltage is low, the current limit is automatically reduced to the maximum possible value that maintains the comparator operative, rather than simply switching off the converter.

DC-DC CMOS converter

A transponder () comprising an antenna (), a demodulator () and a signal processing circuit () which converts a modulated signal received via the antenna () into a signal suitable for processing in the demodulator (). The signal processing circuit () comprises an amplifier () with a predefined amplification factor and a closed loop control circuit () serving to maintain the voltage swing of the processed signal applied at the input of the demodulator () substantially constant. In a preferred embodiment the closed loop control circuit comprises a capacitor which is continually discharged and differingly charged as a function of the strength of the output signal of the amplifier of the signal processing circuit, the voltage resulting across the capacitor controlling a controllable resistor connected in parallel to the input of the signal processing circuit and forming with a coupling capacitor a voltage divider.

Low power regulated amplifier for a transponder

A comparator with hysteresis which achieves fast switching despite a low current consumption. The comparator comprises a first transistor (M) and a second transistor (M) whose gates form the inputs of the comparator. The main current paths of both transistors are connected to each other at one end, with a third transistor (M) and a fourth transistor (M) being provided. The gate of the third transistor is connected to the gate of the first transistor and its main current path is circuited between the one end of the main current paths of the first and second transistor and is connected via the main current path of the fourth transistor to the other end of the main current path of the second transistor. The gate of the fourth transistor is connected to the output signal or inverted output signal of the comparator. The comparator in accordance with the invention may be put to use e.g. in an ASK demodulator such as those used in RFID transponders.

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Niederding, Germany

Franz Prexl