International Business Machines Corporation

Franklin Mark Liu

Joel Roger Davidson

Hehching Harry Li

William Dale Appel

Gricell Co

Lynn Eugene Simmons

Noly Y Lam

A data processing system includes a power control circuit, a processor, a power supply, and a plurality of other components. Upon system reset, the power control circuit can generate at least one sequencing signal indicating a first sequence in which power is to be supplied to the plurality of components. Similarly, power sequencing code executed by the processor upon system reset can selectively generate at least one sequencing signal indicating a second sequence in which power is to be supplied to the plurality of components. The power supply, which can receive both the sequencing signal generated by the power control circuit and the sequencing signal generated by the power sequencing code, supplies power to the plurality of components in the second sequence if the power supply receives the sequencing signal generated by the power sequencing code. In one embodiment, the plurality of components require a plurality of different power supply voltages.

Power sequencing in a data processing system

Two daughter cards connected by bus connectors to a motherboard have integrated circuits connected to each other and to an integrated circuit on the motherboard through a bus network. The bus network is also connected by a bus cable connected at the top of the two daughter cards so as to form a loop within the bus network.

Transmission line loop

A system and method for accessing a multiplicity of memory devices connected to a serial bus of defined protocol and which a direct memory device selection range smaller than the number of memory devices. The memory devices are divided among microcontrollers which selectively enable one or more memory devices responsive to higher level addressing signals sent to the microcontrollers. Thereafter, selectively enabled groups of memory devices are accessed by applying the limited addressing range of the serial bus. The invention finds particular use in modularized systems where cost and complexity are significant considerations by extending the normal range of the chip select function to increase the memory device count beyond the standard bus protocol. A preferred embodiment uses EEPROM devices and an I.sup.2 C protocol bus.

Growing community of inventors

Austin, TX, United States of America

Franklin Mark Liu