Infineon Technologies Ag

Infineon Technologies Austria Ag

Robert Boschgmbh

Frank Wolter

Hans-Joachim Schulze

Franz-Josef Niedernostheide

Maria Cotorogea

Yvonne Gawlina-Schmidl

Tomas Manuel Reiter

Holger Ruething

Dethard Peters

Andreas Riegler

Andreas Kiep

Mathias Plappert

Angelika Koprowski

Georg Schinner

Sandeep Walia

Sascha Axel Baier

Frank Dieter Pfirsch

Ralf Siemieniec

Johannes Georg Laven

Matteo Dainese

Wolfgang Bergner

Christian Jaeger

Alexander Philippou

Ulli Hoffmann

Thomas Aichinger

Erich Griebl

Manfred Pfaffenlehner

Antonio Vellei

Benjamin Visel

Thomas Winkler

Joachim Platzer

Andreas Moser

Christian Pluntke

Robert Roelver

Thomas Jacke

Uwe Wostradowski

Timm Hoehr

Guenther Koffler

Thomas Kropf

Alexander Kleiner

Stefan Laible

Holger RÜTHING

Günther Koffler

A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source regions of the current sense transistor. The doped resistor region has an opposite conductivity type as the source regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.

Dual mode current and temperature sensing for SiC devices

A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.

SiC device having a dual mode sense terminal, electronic systems for current and temperature sensing, and methods of current and temperature sensing

Described herein is a power semiconductor device and corresponding method of production. The semiconductor device includes: a power device region formed in a semiconductor substrate and including first trenches and second trenches extending lengthwise in parallel with one another with semiconductor mesas between adjacent ones of the trenches, each first trench including a gate electrode at a first potential and each second trench including a field plate at a second potential; and a current sense region formed in the semiconductor substrate. A subset of the first trenches, a subset of the second trenches and a subset of the semiconductor mesas are common to both the current sense region and the power device region. The second trenches are interrupted along opposite first and second sides of the current sense region such that the field plates are interrupted between the power device region and the current sense region.

Semiconductor device with integrated current sensor

In an example, a transistor device is provided. The transistor device includes a plurality of transistor cells each including a gate electrode and each at least partially integrated in a semiconductor body that includes a wide bandgap semiconductor material. The transistor device includes a gate pad arranged on top of the semiconductor body, and a plurality of gate runners each arranged on top of the semiconductor body and each connected to gate electrodes of at least some of the plurality of transistor cells. Each gate runner of the plurality of gate runners has a longitudinal direction, and at least one of the gate runners includes at least a section in which a resistivity per area increases in the longitudinal direction as a distance to the gate pad along the gate runner increases.

Transistor device with a varying gate runner resistivity per area

An integrated circuit comprises a power switch comprising a current path and a current sense node; and a temperature sense circuit internally coupled between the current path and the current sense node.

Power switch with an integrated temperature and current sense circuit

A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive trench of the device for the same gate potential condition.

Semiconductor device having active and inactive semiconductor mesas

A semiconductor die includes a single power transistor or power diode, a temperature sense diode formed close enough to the single power transistor or power diode to measure an accurate temperature. The temperature sense diode comprises first and second diodes or strings of diodes. A separate integrated circuit is operable to measure first and second voltage drops of both the first and second diodes or strings of diodes using same magnitude currents, and estimate the temperature of the single power transistor or power diode based on the difference between the first and second forward voltage drop measurements. An overall pn junction area of the first diode or string of first diodes is different from an overall pn junction area of the second diode or string of second diodes.

Integrated temperature sensor for discrete semiconductor devices

A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive gate trench of the device for the same gate potential condition.

Semiconductor device having an active trench and a body trench

A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.

Trench transistor device

A power semiconductor device includes a semiconductor body coupled to first and second load terminals and including a drift region with dopants of a first conductivity type. An active region has at least one power cell extending at least partially into the semiconductor body, is electrically connected with the first load terminal and includes a part of the drift region. Each power cell includes a section of the drift region and is configured to conduct a load current between the terminals and to block a blocking voltage applied between the terminals. A chip edge laterally terminates the semiconductor body. A non-active termination structure arranged in between the chip edge and active region includes an ohmic layer. The ohmic layer is arranged above a surface of the semiconductor body, forms an ohmic connection between electrical potentials of the first and second load terminals, and is laterally structured along the ohmic connection.

High voltage termination structure of a power semiconductor device

A semiconductor device includes a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device. The semiconductor device also includes a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode. A corresponding method for operating a semiconductor device is also disclosed.

Semiconductor devices and methods for operating semiconductor devices

A semiconductor device includes: a drift region formed in a semiconductor substrate; a body region above the drift region; an active gate trench extending from a first main surface and into the body region and including a first electrode coupled to a gate potential; a source region formed in the body region adjacent to the gate trench and coupled to a source potential; a first body trench extending from the first main surface and into the body region and including a second electrode coupled to the source potential; and an inactive gate trench extending from the first main surface and into the body region and including a third electrode coupled to the gate potential. A conductive channel is present along the active gate trench when the gate potential is at an on-voltage, whereas no conductive channel is present along the inactive gate trench for the same gate potential condition.

A semiconductor arrangement is presented. The semiconductor arrangement comprises a semiconductor body, the semiconductor body including a semiconductor drift region, wherein the semiconductor drift region has dopants of a first conductivity type; a first semiconductor sense region and a second semiconductor sense region, wherein each of the first semiconductor sense region and the second semiconductor sense region is electrically connected to the semiconductor drift region and has dopants of a second conductivity type different from said first conductivity type; a first metal contact comprising a first metal material, the first metal contact being in contact with the first semiconductor sense region, wherein a transition between the first metal contact and the first semiconductor sense region forms a first metal-to-semiconductor transition; a second metal contact comprising a second metal material different from said first metal material, the second metal contact being separated from the first metal contact and in contact with the second semiconductor sense region, a transition between the second metal contact and the second semiconductor sense region forming a second metal-to-semiconductor transition different from said first metal-to-semiconductor transition; first electrical transmission means, the first electrical transmission means being arranged and configured for providing a first sense signal derived from an electrical parameter of the first metal contact to a first signal input of a sense signal processing unit; and second electrical transmission means separated from said first electrical transmission means, the second electrical transmission means being arranged and configured for providing a second sense signal derived from an electrical parameter of the second metal contact to a second signal input of said sense signal processing unit.

Sensor for a semiconductor device

A semiconductor die includes a discrete semiconductor device and at least one diode. The temperature of the discrete semiconductor device is determined by measuring a first forward voltage drop of the at least one diode under a first test condition, measuring a second forward voltage drop of the at least one diode under a second test condition and estimating the temperature of the discrete semiconductor device based on the difference between the first and second forward voltage drop measurements.

A semiconductor substrate having a first main surface and a transistor cell includes a drift region, a body region between the drift region and the first main surface, an active trench at the first main surface extending into the drift region, a gate insulating layer at sidewalls and a bottom side of the active trench, a gate conductive layer in the active trench, a source region in the body region, and adjacent to the active trench, a body trench at the first main surface extending into the drift region, the body trench being adjacent to the body region and to the drift region, an insulating layer at sidewalls and at a bottom side of the body trench, the insulating layer being asymmetric with respect to an axis extending perpendicular to the first main surface at a center of the body trench, and a conductive layer in the body trench.

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Munich, Germany

Frank Wolter