Broadcom Corporation

Frank Wayne Singor

Arya Behzad

Tom W Kwan

Ralph A Duncan

Jie Fang

An inductor-less balun low-noise amplifier (LNA) includes a cross-coupled network coupled between first and second input terminals and first and second summing nodes. The cross-coupled network may include: a first non-inverting gain stage coupled between the first input terminal and the first summing node; a first inverting gain stage coupled between the first input terminal and the second summing node; a second non-inverting gain stage coupled between the second input terminal and the second summing node; and a second inverting gain stage coupled between the second input terminal and the first summing node. The cross coupled network may be configurable to provide common-mode rejection when operated in a differential or in a single-ended mode of operation.

Wideband inductor-less balun-LNA with improved pickup noise rejection

Methods and apparatus for improving the current matching within current mirror circuits in applications such as low voltage integrated circuits. Embodiments of the present invention attempt to maintain the proper current ratio between reference and output supplies by adjusting the reference output of the current mirror. An existing reference voltage on the output side of the mirror can be used or a reference voltage can be created to be used for the voltage regulation of the reference side of the current mirror.

Biasing scheme for low supply headroom applications

A circuit and method for bridging an analog signal between two integrated circuits operating at different supply voltages. The circuit is a two stage fixed gain amplifier. The first stage is a transconductance amplifier and the second stage is an operational amplifier. The first stage converts an input signal from a voltage into a current. The second stage converts the current signal to an output voltage signal.

Method and circuit for a dual supply amplifier

Provided is a switched capacitor feedback circuit including two or more input ports configured to receive a corresponding a number of input signals and at least one output port. The output port is configured to output an adjusting signal. The input signals includes a number of primary signals and two or more reference signals that are associated with a first timing phase of operation. The adjusting signal is produced based upon a comparison between the primary signals the reference signals. Also provided is a pair of active devices having gates coupled together and structured to receive the adjusting signal. The active devices are configured to provide a gain to the adjusting signal in accordance with a predetermined gain factor, and facilitate an adjustment to the number of primary signals based upon the gain during a second timing phase of operation.

Switched-capacitor, common-mode feedback circuit for a differential amplifier without tail current

Biasing scheme for supply headroom applications

A method and circuit for adjusting clock pulse widths in a high speed sample and hold circuit. A single phase clock signal is input into a pulse discriminator and separated into rising and falling edges. The edges are adjusted to a desired slope. The adjusted edges and the unadjusted edges are summed and output as multiple clock signals with a desired pulse edge alignment. The clock signals control switches in a manner to reduce signal dependent sampling distortion.

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Laguna Beach, CA, United States of America

Frank Wayne Singor