Mobility Electronics, Inc.

Other

Tao Logic Systems LLC

Intellectual Ventures I LLC

Frank W Ahern

Jeff Doss

Charles Mollo

Desi Rhoden

Alexei Piatetsky

Charles c/o Mobility Electronics Inc Mollo

A computing module includes an interface to asynchronously, serially exchange parallel system bus data with one or more other modules of a computer system that includes the computing module. The computing module can asynchronously, serially transfer first parallel bus data to another module of the computer system, and can asynchronously, serially receive second parallel bus data from another module of the computer system.

Computing module with serial data connectivity

A modular computer system () including a universal connectivity station (UCS) () interconnected to a plurality of remote modules () via a plurality of respective high speed serial links () such as based on proprietary Split-Bridge&#x2122; technology. The plurality modules, including a processor module () which may include core parts including a CPU, memory, AGP Graphics, and system bus interface may be remotely located from each of the other modules, including the UCS (). The present invention achieves technical advantages wherein each module of the modular computer system () appear to each device to be interconnected to the other on a parallel bus since the high speed serial links appear transparent. Preferably, although not necessary, each of the modules including the UCSare based on the PCI bus architecture, or the PCMCIA bus architecture, although other bus architectures are well suited to be incorporated using the present invention. The processor module can be upgraded to change or improve the performance of the modular computer systemwithout requiring any changes to the remaining system, thus drastically improving the price to performance trade-offs of the system. Moreover, the operating system (OS) of each module, including both the software and hardware, do not need to be changed as the entire modular system () is based on a common architecture, such as the PCI or Cardbus bus architecture.

Modular computer system

A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. Allowable ones of the devices include memory devices and input/output devices. The bridge has a link, together with a first and a second interface. The first interface is coupled between the first bus and the link. The second interface is coupled between the second bus and the link. The first interface and the second interface are operable to (a) send information serially through the link in a format different from that of the first bus and the second bus, (b) approve an initial exchange between the first bus and the second bus in response to pending transactions having a characteristic signifying a destination across the bridge, (c) exchange information between the first bus and the second bus according to a predetermined hierarchy giving the first bus a higher level than the second bus, and (d) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus, including memory devices and input/output devices that may be present: (i) using on the first bus substantially the same type of addressing as is used to access devices the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

Device including serial interface

System enabling device communication in an expanded computing device

A methodology by which a host computer can dynamically rebalance PCI-to-PCI bridges to overcome Operating System/BIOS and Chipset limitations in order to allow multiple level PCI buses. This methodology also allows hot-swappable PCI buses to be added and removed without failure. Additionally this method allows for proper I/O resource allocation where previously alliasing preventing this. The present invention overcomes the limitations of an Operating System, such as Windows 2000 and Windows XP, to allow a PCI bus segment to be added by rebalancing the PCI bus tree and resource requirements as needed in order to fit the new PCI bus segment.

Driver supporting bridge method and apparatus

Unique serial protocol minicking parallel bus

An improved extended cardbus/PC card controller ( ) incorporating proprietary Split-Bridge&trade; high speed serial communication technology for interconnecting a conventional parallel system bus via a high speed serial link with a remote peripheral device. The extend cardbus/PC card controller is adapted to interface the parallel system bus, which may be PCI, PCMCIA, integrated, or some other parallel I/O bus architecture, with peripheral devices via PC cards, and now optionally via a high speed serial link using the proprietary serial Split-Bridge&trade; technology. The serial Split-Bridge&trade; technology provides real time interconnection between the parallel system bus and the remote device which may also be based on a parallel system data bus architecture, over a serial link, which serial link appears to be transparent between the buses and thus facilitates high speed data transfer exceeding data rates of 1.0 GigaHertz.

Extended cardbus/pc card controller with split-bridge &trade;technology

A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. Allowable ones of the devices include memory devices and input/output devices. The bridge has a link, together with a first and a second interface. The first interface is coupled between the first bus and the link.

Duplex operation and simultaneous information transfer across a link in a expanded computer system

A docking system can give a portable computer access over a first bus in the portable computer to a second bus in a docking station. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. The docking system has a serial link cooperating with a first and a second interface to act as a single bridge. The first interface is coupled between the first bus and the link. The second interface is coupled between the second bus and the link. The first interface and the second interface are operable to (a) send bus-related information through the link in a format different from that of the first bus and the second bus, and (b) allow the portable computer, communicating through the first bus, to individually address one or more of the bus-compatible devices on the second bus using on the first bus substantially the same type of addressing as is used to access devices on the first bus.

Method and apparatus for exchanging information between buses in a

A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. Allowable ones of the devices include memory devices and input/output devices. The bridge has a link, together with a first and a second interface. The first interface is coupled between the first bus and the link. The second interface is coupled between the second bus and the link. The first interface and the second interface are operable to (a) send bus-related information serially through the link in a format different from that of the first bus and the second bus, (b) approve an initial exchange between the first bus and the second bus in response to pending transactions having a characteristic signifying a destination across the bridge, (c) exchange bus-related information between the first bus and the second bus according to a predetermined hierarchy giving the first bus a higher level than the second bus, and (d) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus, including memory devices and input/output devices that may be present: (i) using on the first bus substantially the same type of addressing as is used to access devices the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

Growing community of inventors

Scottsdale, AZ, United States of America

Frank W Ahern