Zentrum Mikroelektronik Dresden Ag

Apple Inc.

National Semiconductor Corporation

Dialog Semiconductor (UK) Limited

Idt Europe Gmbh

Frank Trautmann

Armin Stingl

Michael Couleur

Fabio Ongaro

Jianhui Zhang

Nikola Jovanovic

Ivan Muhoberac

Christian Glassner

Martin Embacher

Marco Meola

Christian Giassner

Control circuitry for controlling the duty cycle of a magnetizing switch of a power converter containing a demagnetizing switch is described. The magnetizing switch and the demagnetizing switch are switched on within a sequence of commutation cycles in a mutually exclusive manner. The control circuitry is configured, within a commutation cycle from the sequence of commutation cycles, to determine a sensed current signal indicative of a current through the magnetizing switch. The control circuitry determines a ramp signal by adding a slope compensation signal to the sensed current signal. The control circuitry determines a threshold signal and determines a duty cycle for the magnetizing switch for the commutation cycle by comparing the ramp signal with the threshold signal. The threshold signal and/or the slope compensation signal depend on the duty cycle for the magnetizing switch of a preceding commutation cycle from the sequence of commutation cycles.

Peak current control for a power switch of a power converter

An apparatus includes a plurality of pulse control circuits and a control circuit. A given pulse control circuit of the plurality of pulse control circuits may source a current pulse to the output power signal based on a comparison of a particular feedback signal of a plurality of feedback signals and a target voltage signal. The control circuit may offset a voltage level of each feedback signal of a first subset of the plurality of feedback signals. The first subset may exclude a first feedback signal. In response to a determination that a period of time has ended, the control circuit may offset a voltage level of each feedback signal of a second subset of the plurality of feedback signals. The second subset may include the first feedback signal and exclude a second feedback signal.

Multiphase interleaved pulse frequency modulation for a DC-DC converter

Power converter includes a switched power stage to generate an output voltage from an input voltage, and a controller to generate a pulse width modulation (PWM) signal for switching the switched power stage in dependence upon a voltage error signal. The voltage error signal is a difference between a reference voltage and the output voltage. The controller comprises a synchronizer to generate a first clock signal for clocking a low frequency domain of the controller, and a digital PWM controller clocked by the first clock signal and configured to determine an on-time information of the PWM signal and a PWM generator to generate the PWM signal based on the on-time information. The synchronizer is configured to synchronize a frequency of the PWM signal to a frequency imposed by the external reference signal by synchronizing a frequency of the first clock signal to the frequency imposed by the external reference signal.

Switched power converter with improved synchronization of a pulse width modulation switching frequency

In a Pulse Width Modulation power converter and control method, wherein one of the operating modes steady state or load transient is detected. For either of the two operating modes one set of PID coefficients is provided for the control law that controls the duty ratio command. In case a load transient is detected, the KP gain is selected adaptively. Operating mode detection is supported by oversampling the error signal.

Pulse width modulation power converter and control method employing different sets of PID coefficients

In a control method for a buck power converter, an output voltage is generated according to a pulse width modulation signal and an input voltage; an error signal is generated by sampling the output voltage and differencing the sampled output voltage and an output voltage reference; a duty ratio that defines a duty cycle of a pulse width modulation signal is determined by a control law; the pulse width modulation signal is generated by providing the duty ratio to a digital pulse width modulator; a steady state or a load transient is detected; and an average inductor current is monitored and a difference between the average inductor current and a specific inductor current limit is accumulated in order to generate an offset value which is subtracted from the output voltage reference.

Power converter with average current limiting

A method and an apparatus for generating PWM signals is provided. Upon detection of a load transient, a new PWM period is started if the load transient occurs during the off-time of a PWM signal and exceeds a specific magnitude.

Method for generating PWM signals and a pulse width modulation power converter

A method for regulating a buck converter, in which the amount of the output volume is adjusted via a controlled switching, comprising a pulse sequence having a pulse rate and being pulse width modulated, and an inductor, which is switched serially with a load over which an output voltage drops, and an arrangement with a control input and with a control output, between which an analog-to-digital converter, a non-linear amplifier, an IIR filter, and a pulse width modulation circuit is switched, to allow a quick reaction upon a load transient by which the regulation of the output voltage at a buck converter occurs faster and with less overshooting. This is attained such that the sample rate is adjusted to be greater than the pulse rate and the pulse values of the pulse sequence are controlled during the cycle duration.

Method for the closed-loop control of a buck converter and arrangement for implementing the method

A buck/boost regulator controller is provided. The buck-boost regulator controller controls four switches in an H-bridge configuration to control voltage regulation. The buck/boost regulator controller includes a digital error amplifier and buck-boost control logic. The digital error amplifier provides a multi-bit digital error voltage signal that is based on the difference between the output voltage and the desired output voltage. The buck-boost control logic controls the opening and closing of the four switches in the H-bridge based, in part, on the multi-bit digital error voltage signal.

Growing community of inventors

Munich, Germany

Frank Trautmann