Infineon Technologies Ag

Frank Schroeppel

Joerg Vollrath

Manfred Pröll

Jörg Kliewer

Marcin Gnat

Aurel Von Campenhausen

Jürgen Auge

An integrated semiconductor memory includes memory cells that store a first data record has at least one datum with a first or second data value and a second data record has at least one datum with the first or second data value. The integrated semiconductor memory has a combination circuit that generates the third data record on the output side from the data records fed to the combination circuit on the input side to ascertain based on the third data record whether the first and second data records have been fed to the combination circuit on the input side. The combination circuit generates the datum of the third data record with the first data value, if the first and second data records were fed to the combination circuit on the input side.

Integrated semiconductor memory

An integrated semiconductor memory includes a memory cell array with at least one memory cell, in which a data value is stored, and an evaluation circuit with a counter. During a test of the integrated semiconductor memory, a counter reading of the counter is altered if the data value stored in the memory cell deviates from a desired value. A threshold value is predefined by a control circuit. A programming circuit compares the threshold value on the input side with the instantaneous counter reading of the counter. If the counter reading of the counter exceeds the threshold value, a programming element changes from a first programming state to a second programming state. After the conclusion of the test, the state of the programming element is read out via an output terminal. This scheme makes it possible to deduce a possible cause of failure of the integrated semiconductor memory.

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Taufkirchen, Germany

Frank Schroeppel