Marvell Asia Pte., Ltd.

Aquantia Corporation

Frank McCarthy

Jose Tellado

Seid Alireza Razavi Majomard

Ragnar Hlynur Jonsson

Moshe Malkin

Sina Barkeshli

A physical layer transceiver for a wireline communications system includes a receive path for communicating signals received from the medium to a functional circuit, a transmit path for communicating signals received from the functional circuit onto the medium, and echo cancellation circuitry for cancelling from the receive path echoes of signals transmitted on the transmit path. The echo cancellation circuitry includes a plurality of high-dynamic-range filter segments, a plurality of low-dynamic-range filter segments, and control circuitry configured to detect on the receive path the echoes of the signals transmitted on the transmit path, classify each echo signal as having a low dynamic range or a high dynamic range, and deploy a high-dynamic-range segment to a location of an echo signal having a high dynamic range, and deploy a low-dynamic-range segment to a location of an echo signal having a low dynamic range.

Method and apparatus for cancelling echo signals having different dynamic ranges

A physical layer (PHY) processor of a network interface device operates in a low power state in which a transceiver of the PHY processor device periodically does not transmit on a communication link during a plurality of quiet time slots. In response to determining a low signal-to-noise ratio (SNR) condition associated with the communication link, the PHY processor transitions to a link recovery state in which the transceiver continuously transmits idle symbols. In response to determining that the low SNR condition has ended, the PHY processor transitions from the link recovery state to the low power state.

Energy efficient ethernet (EEE) link recovery from low SNR

Embodiments of methods, apparatuses and systems for transceiver processing are disclosed. One method includes a transceiver receiving a data stream from a link partner transceiver. A link parameter of a link between the transceiver and the link partner transceiver is determined. Allocation of transceiver processing between high-latency processing and low-latency processing is based at least in part on the link parameter.

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Alameda, CA, United States of America

Frank McCarthy