Gm Global Technolgoy Operations, Inc.

Delphi Technologies, Inc.

Frank J Schauerte

John Richard Troxell

Charles Neil Stevenson

Brian Thomas Murray

Ronald Michael Lesperance

An image sensor comprising an integrated circuit chip that includes both a pixel array and edge detection circuitry hardwired together on the chip. The pixel array provides an addressable, non-destructive readout of the pixel data, with the edge detection circuit providing a hardwired implementation of a pair of n&#xd7;n masks that are convolved with the pixel array data to thereby generate horizontal and vertical edge data that is combined together and outputted by the image sensor. The masks are implemented as a pair of one-dimensional filters, with one of the filters being a one-dimensional Gaussian filter used to smooth the pixel data along one axis and the other filter providing a first derivative Gaussian function to detect edges along the other, orthogonal axis. The non-destructibility of the readout from the pixel array eliminates the need for buffering large amounts of pixel data and the use of separable, one-dimensional filters permits each mask to be implemented using only n simultaneous outputs from the array, 2weights, and n&#x2212;1 buffers for temporary storage of the smoothed pixel data.

Image sensor method and apparatus having hardware implemented edge detection processing

An image sensor having an array of pixel elements constructed using a two level polysilicon CMOS process that provides individual addressability and a non-destructive readout of the pixels. The pixel elements each includes a substrate, an insulating layer formed on the substrate, a collection capacitor electrode, a transfer electrode, a readout capacitor electrode, and a readout transistor. The transfer electrode is located between the collection and readout capacitor electrodes and all three electrodes are electrically isolated from the substrate and each other by the insulating layer. The collection capacitor electrode and insulating layer are transparent so that incident light can pass through these elements and be absorbed by the substrate. A bias voltage is applied to the collection electrode to form a depletion region in the substrate where photoelectrically generated charge is collected. The charge is then transferred to a second depletion region underneath the readout capacitor electrode by applying a bias voltage to the transfer electrode. The readout transistor has an insulated gate connected to the readout capacitor electrode, so that it can generate a pixel data output signal indicative of the charge that is now stored under the readout capacitor electrode. This reading out of the pixel data is therefore non-destructive, allowing the pixel to be read multiple times without loss of information. An image sensor so constructed can be used in conjunction with on-chip image processing circuits for performing such tasks as edge detection and other algorithms that involve convolutions or other combinations of pixel data.

Image sensor method and apparatus having addressable pixels and non-destructive readout

A self testing CMOS imager chip includes a controller which outputs a sewer signal, a dump signal, a collect signal, and a read signal, and a pixel array connected to the controller including a plurality of pixels arranged in an array of rows and columns, each pixel having a collect gate disposed adjacent a collect well for receiving a charge in response to application of the collect signal to the collect gate, a sewer for injecting a charge into the collect well in response to the concurrent application of the sewer signal to the sewer and the collect signal to the collect well, a read gate disposed adjacent a read well for receiving the injected charge from the collect well in response to application of the read signal to the read gate and the absence of the collect signal at the collect gate, and a transistor having a gate coupled to the read well, a source for receiving the read signal, and a drain coupled to an output node connected to the controller. The read signal is modulated by the injected charge at the gate of the transistor, thereby generating an injected output signal at the output node representing the injected charge. The controller, through read-out circuitry, comparing the injected output signal to an expected output signal to test the operation of each pixel of the array.

Self testing CMOS imager chip

A photoresponsive device wherein a plurality of slots is formed in a continuous polycrystalline silicon film that forms a top electrode of the photoresponsive device structure. The resulting &ldquo;picket fence-like&rdquo; fingers are capable of generating a depletion region that extends beyond the physical extent of the fingers themselves. The shorter wavelengths of light can reach these unobstructed depletion areas of the substrate and be rapidly detected instead of being absorbed in the electrode. By appropriate spacing of the individual fingers, the individual depletion regions can be effectively merged into one continuous depletion region.

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Berkley, MI, United States of America

Frank J Schauerte