Hughes Aircraft Company

Delco Electronics Corporation

Gm Global Technolgoy Operations, Inc.

Frank J Bohac, Jr

James M Aralis

Raymond Lippmann

James Edward Nelson

Michael J Schnars

James R Chintyan

Thomas Arthur Perry

Thomas Hubert Van Steenkiste

John Robert Bradley

Jeffrey A Sell

Mark C Hansen

Martin Stephen Meyer

Anthony Luke Simon

Richard Earl Teets

Bruce L Troutman

Hiro Yamasaki

Everett K Shelton

Manfred W Reissmueller

Jerry S Roach

Frank J Calabretta

Bert S Moriwaki

Mark B Naglestad

Dozier: James R

An integrated circuit architecture and test methods for use in designing, fabricating and testing mixed-signal application specific integrated circuits. The architecture comprises a plurality of mixed-signal integrated circuits, bidirectional buffers coupled to the integrated circuits that provide for circuit reconfigurability, a bidirectional digital/analog test bus, and a serial test controller coupled to the buffers that controls normal operation and testing of the integrated circuits. The controller and plurality of buffers cooperate to couple signals from signal pads to the integrated circuits to provide for 'normal' operation thereof, and to re-route external test signals applied to selected signal pads to the integrated circuits to permit testing. Logic in the buffers provides for functional configurability, enabling them to be logically altered under control of the controller, and allowing the test bus to be connected directly to signal pads. All of the signal pads are available for use in testing, and provide a means of directly accessing key test points within the circuit without resorting test vectors. Test methods are disclosed and comprise: selecting an integrated circuit for testing; selecting signal pads that are to be used to test the selected integrated circuit, which selected signal pads are different from those used during normal operation of the integrated circuit; applying external test signals to the selected signal pads; routing the external test signals by way of the plurality of configurable buffers and the bidirectional bus from the selected signal pads to the integrated circuit; and monitoring input signals and output signals applied to and derived from the selected signal pads to test the selected integrated circuit.

Mixed signal integrated circuit architecture and test methodology

This invention relates to an apparatus for sensing a vehicle steering wheel position. A permanent magnet target wheel having a global axial magnetic field normal to a first surface is attached to a steering shaft which is rotated by the steering wheel. Multiple regions equally spaced along a common radius on the first surface are magnetically altered and sensed by magnetically responsive sensors positioned adjacent the first radius. A single region positioned within a finite radius along a second radius on the first surface is magnetically altered and sensed by a magnetically responsive sensor positioned adjacent the second radius. The magnetic sensors are responsive to passage of the multiple regions and single region as the target wheel is rotated. Detection of each of the multiple regions corresponds to rotation of the target wheel by an incremental number of degrees. Detection of the single region corresponds to a target wheel position within a predetermined angular range, referred to as the center position. A turn counter is utilized to determine which of the center positions corresponds to the steering wheel neutral position.

Vehicle steering wheel position sensing apparatus

An apparatus for processing data, such as liquid level data in a motor vehicle containing a liquid storage tank, comprises a liquid level sensor for developing a signal indicative of instantaneous liquid level in the storage tank, circuitry for processing the instantaneous liquid level signal, including asymmetrical filtration of the instantaneous liquid level signal, to provide a process output signal, and a display apparatus for displaying an indication of the level of liquid in the storage tank in response to the process output signal.

Slew rate limiter with asymmetrical operation

An integrated circuit including a serial interface (12) having a nonvolatile memory (30) coupled to a and configuration of circuit boards and entire systems. A configurable circuits (10) containing switches, resistors, capacitors or digital logic devices has an unique identification code and is electrically configured by connection to a nonvolatile memory (30). An interrogation shift register (38) and a configuration data shift register (36) are serially connected to receive a serial bit stream (50) containing an interrogation code section and a configuration data section. The interrogation code, which is identical to the identification code of a selected one of the configurable circuits, is compared with the circuit identification code to provide a match pulse (42) that enables a program signal to initiate transfer of data from the data shift register (36) to the nonvolatile memory (30).

Nonvolatile serially programmable devices

A circuit including a sender providing a sender output signal responsive to a vehicle parameter, circuitry for providing an adjustable reference, circuitry for comparing the output signal to the adjustable reference and providing a comparison output signal therefrom, an up/down counter for filtering the comparison output signal, and circuitry for providing an indicator control signal in response to the filtered output signal and for controlling the adjustment of the adjustable reference, provides a signal to a vehicle operator that is both filtered and has hysteresis to minimize repeated switching of the signal between two states.

Filter with hysteresis for trip point applications

A circuit disclosed maintains ratiometric analog inputs to an integrated circuit using a network of resistors, some of which are external to the integrated circuit and some of which are internal to the integrated circuit, reducing expense. The analog inputs maintain a fixed ratio during fluctuations in supply voltage and fluctuations in temperature.

Circuit with ratiometric analog inputs

A shunt regulator for the programming voltage of programmable circuit devices employs components formed of the same layers that make up the regulated devices, including the same tunnel structure (52) of floating gate devices that are being regulated. A transistor (66) connected as a load on the programming voltage line (10) is itself controlled by tunneling structure (52) and capacitors (18, 20) formed by layers corresponding to layers of the regulated devices so that variations in the regulator components will track variations of the regulated components to automatically compensate for manufacturing process variations.

Shunt regulator with tunnel oxide reference

A voltage multiplier circuit is disclosed. The circuit comprises three p-channel MOS transistors and three capacitors. When these elements are connected to properly phased transfer and pump clock signals of positive polarity, the circuit generates a negative output voltage which is roughly equal in magnitude to the peak-to-peak voltage of the pump clock. One of the transistors couples the output node to the circuit input node, and is clocked by the transfer clock so as to isolate the input node from the output node when the output node potential is lower than the input node potential. Several of the circuits may be cascaded to produce a large negative supply from a small positive supply. The circuit is advantageously employed to provide the programming signal supply for EEPROM devices.

Circuit for multiplying a pump clock voltage

A bistable latch circuit is disclosed which can be electrically programmed to be stable in only one of its two states so that this same state is always set when power is applied to the circuit. The circuit can be electrically reprogrammed at will to select either of its stable states, and it draws no dc current during either the program mode or read mode. During the read mode, the potentials on the circuit nodes are such that long data retention times are achieved.

Growing community of inventors

Laguna Hills, CA, United States of America

Frank J Bohac, Jr