Integrated Device Technology, Inc.

Cypress Semiconductor Corporation

Frank Hwang

Chuen-Der Lien

Howard Chonghe Yang

Jimmy J Lee

Gang Shan

Kuang-Yu Chen

Hyunbae Kim

Paul Lap Tak Cheng

Hueng-Cheng Eric Chen

A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset value(s), and combinations of such.

Method and apparatus for clock generation

A method and apparatus for Clock and PLL N-Divider Switch have been disclosed.

Controlling a clock divider by selecting a preset value

A method and apparatus for a buffer with programmable skew have been disclosed. Several output signals are generated. Based on one of the output signals several feedback signals are generated. The feedback signals are then received and compared. Based on the comparisons, the skew between the output signals is adjusted.

Method and apparatus for buffer with programmable skew

A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset values(s), and combinations of such.

An apparatus comprising a circuit that may be configured to (i) change a frequency of one or more first signals in response to a second signal and (ii) generate a third signal in response to either the second signal or a predetermined time period expiring.

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Sunnyvale, CA, United States of America

Frank Hwang