Motorola Corporation

Frank Djennas

Isaac T Poku

Robert Yarosh

Alan H Woosley

Victor K Nomi

John R Pastore

Bennett A Joiner

Curtis W Mitchell

Twila J Reeves

Wilhelm Sterlin

Les Postlethwait

A low profile semiconductor device (24) is manufactured by mounting a semiconductor die (26) onto a substrate (28) using an interposer (30). The interposer couples an active surface (32) of the die (26) to conductive traces (33) on the top surface of the substrate. The interposer is directionally conductive so that electrical conductivity is limited to the z-direction through thickness of the interposer. The interposer both affixes the die to the substrate and provides the first level of interconnects for the device. The inactive surface (36) of the die can be exposed for efficient thermal dissipation. An optional heat spreader (50) may be added for increased thermal management. The device may be overmolded, glob-topped, capped, or unencapsulated. Separate die-attach and wire bonding processes are eliminated. A second level of interconnects are provided by either solder balls (38), solder columns (44), or pins (64).

Low profile semiconductor device with like-sized chip and mounting

A wire bondable plastic encapsulated semiconductor device (58) having no die supporting surface can be manufactured. In one embodiment, a semiconductor die (22) and a plurality of conductors (12) extending toward the periphery of the die are provided. The die is rigidly held in place on a workholder (60) with a vacuum (62) for the wire bonding process. Wire bonds (26) electrically connect the die to the conductors. The wire bonded die is then placed inside a mold cavity (64), and a resin encapsulated is transferred into the cavity under elevated temperature and pressure to form package body (70) around the die, the wire bonds and a portion of the conductors. Before the package body is formed, the die is supported solely by the the rigidity of the wire bonds since there is no die supporting surface connected to the conductors.

Method for making semiconductor device having no die supporting surface

A semiconductor device (10) includes a lead frame (12) having tie bars (16). In one form of the invention, the tie bars are used to support a semiconductor die (20) to alleviate package cracking problems caused by stress and to provide a universal lead frame which is suitable for use with many different die sizes. In another embodiment, a semiconductor device (45) includes a lead frame (40) having a mini-flag (42) to accomplish these same objectives.

Semiconductor device having x-shaped die support member and method for

Semiconductor device having universal low-stress die support and method

A semiconductor device (30) utilizes a lead frame (32) having a window-frame flag (36). An opening (44) within the flag creates an interior edge (46) which is tapered, preferably to an angle .phi. that is between 55.degree. and 65.degree.. The tapered interior edge reduces boundary-layer separation of a resin molding compound during formation of a resin package body (42). Thus, voids in the resin packaging material near the interior edge of the flag are less likely to be formed.

Semiconductor device having window-frame flag with tapered edge in

A process for flashing a thin layer of silver on metal leadframes using no mask steps and a minimal amount of silver. An unmasked metal leadframe is placed into a cleaning bath that includes silver in solution and has no outside electrical driving force to assist plating. The leadframe is removed from the cleaning bath once a uniform silver layer having a thickness of 100 to 1000 angstroms is plated thereon. The silver layer need not be exact and, therefore, it is not critical that the period of time the leadframe remains in the cleaning bath be exact.

Growing community of inventors

Austin, TX, United States of America

Frank Djennas