Cisco Technology, Inc.

Frank Chui

Gene K Chui

Gary Kipnis

Gurmohan Singh Samrao

Onchuen D Lau

David Anthony Hughes

Neil King

Quang Nguyen

Madhav V Marathe

Eugene T Wang

Lionel A King

Dan Klausmeier

Daryn Lau

O Daryn Lau

Gurmobau Samrao

A synchronization state for a local clock generating circuit of a first of a number of components of a distributed system is maintained according to a number of local clock cycles recorded between successive occurrences of a global synchronization signal provided to the components within the distributed system. The local clock generating circuit may enters the synchronization state only after observing a predetermined number of occurrences of successive local clock cycles between instances of the global synchronization signal. The local clock generating circuit continues to provide local control signals for the first of the components at time instants corresponding to the number of local clock cycles even after an instance of the global synchronization signal is observed at a time instant corresponding to one local clock cycle more or less than the number of local clock cycles. However, the local clock generating circuit enters an alarm state when the global synchronization signal is observed at time instants corresponding to more than one local clock cycle more or less than the number of local clock cycles.

Scheme for maintaining synchronization in an inherently asynchronous system

A method for cell replication in which a request for data transmission and mapping information are received by a crossbar and a scheduler and are sent by one of a plurality of software configurable slot remap registers. The mapping information is indicative of a destination slot and a backup destination slot to which the data is to be transmitted. The method replicates the data by transmitting the data to the destination slot and to the backup destination slot when the data arrives at an input slot of the crossbar.

Method for implementing automatic protection switching (APS) using cell replication

An apparatus is described comprising an ingress port and a plurality of switch planes where each of the switch planes has a dedicated scheduler and each of the switch planes are communicatively coupled to the ingress port. The switch planes may further have at least one input control port and at least one output control port where each of the input control ports are coupled to each of the output control ports in a crossbar arrangement. The communicative coupling may further comprise one of the input control ports coupled to the ingress port. Furthermore, the ingress port may have at least one unicast queue which is dedicated to a specific egress port. The ingress port may also have a multicast queue. The dedicated scheduler may further comprise a pointer to determine priority between multicast and unicast traffic, a pointer to determine priority between contending input control ports having multicast traffic and/or a pointer for each of the output control ports to determine priority between contending input control ports having unicast traffic. The apparatus may also further comprise a plurality of ingress ports where each of the ingress ports are communicatively coupled to one of each of the input control ports.

Crosspoint switch with independent schedulers

A method of managing a network switch. The method having the first step of detecting a status of a set of physical ports on an interface card in the network switch. Then, determining if the status is in a first state that indicates that all physical ports in the interface card are inaccessible. If the status is in the first state, then accepting all traffic for the set of physical ports. Also disclosed is an apparatus for performing the method.

Method and apparatus of handling data that is sent to non-existent destinations

A communication interface is described to align at a destination data transmitted through different channels before that data is read out. The communication interface includes a receiver circuit that has a plurality of buffers. Each buffer is coupled to a corresponding channel to receive data therethrough. The communication interface also includes a control circuit, coupled to the plurality of buffers, to enable reading of data from the plurality of buffers when each of the plurality of buffers has received at least one unit of data.

FIFO buffers receiving data from different serial links and removing unit of data from each buffer based on previous calcuations accounting for trace length differences

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Sunnyvale, CA, United States of America

Frank Chui