Marvell International Limited

Marvell Semiconductor, Inc.

Francis Campana

William Lo

Pierte Roo

The present invention relates to methods and apparatus for performing reverse auto-negotiation, in which one network device establishes a link with another network device at a preferred operating mode (e.g., the lowest speed) common to both devices without linking twice. The physical layer of a local network device (local PHY) may stall the normal auto-negotiation process with the link partner, while receiving the abilities of the link partner. The local PHY may then transmit a signal having only the preferred common operating mode (e.g., the lowest speed) encoded within. The link partner may then conclude that the local PHY is only capable of the preferred common operating mode (e.g., the lowest speed) and a link between the two devices may be established at that common mode.

Methods and apparatus for performing reverse auto-negotiation in network communication

A network device including a receiver, a counter, and a trigger. The receiver is configured to receive idle code groups or false carriers from a remote device. The idle code groups indicate that there is no data to be sent from the remote device, and the false carriers indicate a fault. The counter is configured to count the at least one of the idle code groups or the false carriers detected during a predetermined period. The trigger is configured to (i) assert a first signal if the counter exceeds a predetermined threshold during the predetermined period to resynchronize the network device to the remote device and (ii) count a number of times the first signal is asserted without bringing down a link between the network device and the remote device.

Methods and apparatus for breaking and resynchronizing a data link

A resynchronization device for an Ethernet network device with a transmitter and a receiver includes a detector that detects faulty code groups received by the receiver. A counter counts the faulty code groups that are detected by the false carrier detector during a predetermined period. A resynchronization trigger asserts a resynchronization signal if the counter exceeds a predetermined threshold during the predetermined period. The faulty code groups include false carriers, which include non-idle code groups other than frame delimiters. Alternately, the faulty code groups include idle code groups that match idle code groups generated by the transmitter of the local network device.

A physical coding sublayer (PCS) device includes a first data scrambler, a second data scrambler, and a selector. The first data scrambler scrambles first data and implements a first scrambling cycle. The second data scrambler scrambles second data and implements a second scrambling cycle. The second data is different than the first data. The second scrambling cycle is shorter than the first scrambling cycle. The selector selects the first data scrambler to scramble the first data during normal operations. The selector selects the second data scrambler to scramble the second data during testing. The first data scrambler does not scramble the second data. The second data scrambler does not scramble the first data.

Alternative 1000BASE-T scrambler

An interpolator testing system comprises an interpolator that generates M clock signals having phase shifts in increments of 360/M degrees relative to a reference clock signal and that outputs one of the M clock signals as a recovered clock signal. A recovered clock counter counts an attribute of the recovered clock signal, wherein the interpolator sequentially selects the M clock signals N times, wherein M and N are integers greater than one.

Interpolator testing circuit

A physical layer of an Ethernet network device includes first, second, third and fourth terminals. An autonegotiation circuit includes an autonegotiation wait timer having an autonegotiation wait period. An auto-crossover circuit selectively configures the first and second terminals as one of a transmitter and a receiver and the third and fourth terminals as the other of the transmitter and receiver. The auto-crossover circuit includes a sample timer having a sample timer period that has a value that is greater than or equal to the autonegotiation wait period. The auto-crossover circuit includes a random number generator that communicates with the sample timer and generates n random numbers. The sample timer selects one of n sample timer periods based on the generated random number. The n sample timer periods have values that are greater than or equal to the autonegotiation wait period.

Method and apparatus for automatic crossover and parallel detect

An interpolator testing system and method comprises an interpolator that includes a phase shift module. The phase shift module receives a reference clock signal and generates M clock signals having phase shifts in increments of 360/M degrees relative to the reference clock signal. A phase select module receives the reference clock signal and a recovered clock signal during a normal mode and generates a select signal based on a comparison of the reference clock signal and the recovered clock signal during the normal mode. A selector receives the M clock signals and outputs one of the M clock signals as the recovered clock signal based on the select signal. A recovered clock counter counts an attribute of the recovered clock signal during a test mode. The phase select module sequentially selects the M clock signals N times during the test mode.

A nonlinearity detection system for an analog to digital converter (ADC) comprises a signal generator that generates a periodic signal that is output to the ADC and that comprises first and second intervals. The periodic signal monotonically increases during the first interval and monotonically decreases during the second interval. A differentiator module communicates with the ADC and that generates an output signal that is based on an output of the ADC and a delayed output of the ADC. A nonlinearity detection module detects slope discontinuities in the output signal of the differentiator module.

Built-in real-time digital non-linearity measurement device and method for analog to digital converters

A nonlinearity detection system and method for an analog to digital converter (ADC) includes a triangular wave generator that generates a triangular wave that is output to the ADC. A differentiator module communicates with the ADC and generates an output signal that is based on an output of the ADC and a delayed output of the ADC. A nonlinearity detection module detects slope discontinuities in the output signal of the differentiator module.

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Milpitas, CA, United States of America

Francis Campana