Infineon Technologies Ag

Francesco Polo

Richard Gaggl

Mario Motz

Andreas Wiesbauer

Tobias Werth

Christian Jenkner

Christian Ebner

Benno Muehlbacher

Stephan Mechnig

Florian Brugger

Ernesto Romani

Luca Valli

Joseph Hufschmitt

Carlos Humberto Garcia Rojas

The present disclosure relates to circuits for detecting a line short circuit and/or a line interruption in a differentially operated line network, comprising at least one control circuit configured to control at least one common-mode signal of the differentially operated line network vis-à-vis a predefined common-mode signal variable and to indicate a line short circuit and/or a line interruption in the differentially operated line network if at least one control or controlled variable of the control circuit exceeds a predefined threshold value.

Circuits and methods for detecting line short circuits and/or line interruptions in differentially operated line networks

A bandgap reference circuit includes a bandgap reference core circuit that includes a first bipolar transistor having a first emitter current density and a first base-emitter voltage, a second bipolar transistor having a second emitter current density that is smaller than the first emitter current density and having a second base-emitter voltage, a resistor that is connected to the emitter of the second bipolar transistor, and a differential amplifier circuit that is configured to control first and second emitter currents through the first and second bipolar transistors, respectively, such that a sum of the second base-emitter voltage and a voltage drop across the resistor approximates the first base-emitter voltage. The bandgap reference circuit further includes a first replica bipolar transistor that emulates an operating point of the first bipolar transistor and a second replica bipolar transistor that emulates an operating point of the second bipolar transistor.

Bandgap reference circuit

In accordance with an embodiment, a circuit includes an amplifier and a programmable capacitor coupled between an output of the first non-inverting and the input of the first amplifier.

System and method for signal read-out using source follower feedback

An embodiment amplifier circuit includes a pair of subcircuits that includes a first subcircuit and a second subcircuit, each of which includes a buffer amplifier and a feedback circuit that includes a feedback capacitor. The amplifier circuit also includes a pair of output terminals. The first subcircuit and the second subcircuit each generate a different output signal of a pair of output signals that includes a first output signal and a second output signal. The amplifier circuit is configured for receiving a positive differential input signal at the first subcircuit, receiving a negative differential input signal at the second subcircuit, and receiving the pair of output signals at the pair of output terminals. The amplifier circuit is also configured for transmitting the first output signal to the feedback circuit of the first subcircuit, and transmitting the second output signal to the feedback circuit of the second subcircuit.

A circuit for biasing a MEMS microphone includes a first group of serially-coupled transistors coupled between a first node and a second node, a second group of serially-coupled transistors coupled between the first node and the second node, and a voltage divider circuit coupled to the second node having a number of outputs, a first group of outputs being coupled to corresponding control nodes associated with the first group of serially-coupled transistors, and a second group of outputs different from the first group of outputs coupled to corresponding control nodes associated with the second group of serially-coupled transistors, the control nodes being either bulk nodes or gate nodes.

PVT compensated resistive biasing architecture for a capacitive sensor

A measurement method includes generating, by a sensor, a response signal in response to an excitation signal. The method also includes generating a sampling clock signal in accordance with a pseudo-random jitter, and sampling the response signal in accordance with the sampling clock signal to determine a plurality of digital samples. The method also includes combining the plurality of digital samples to form a measurement sample.

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Arnoldstein, Austria

Francesco Polo