Dialog Semiconductor (uk) Limited

Apple Inc.

Francesco Dalena

Stefano Scaldaferri

Enrico Pardi

Alexandre Morello

Danilo Gerna

Nicolo Nizza

Mirko Pasca

Tommaso Baldetti

Stefano D'Amico

An integrated circuit can include latched comparator circuitry. The latched comparator circuitry may include first and second input transistors configured to receive an input signal, first and second cross-coupled inverting circuits, reset transistors, and a current pulse generator. The first and second inverting circuits may each include a pull-up transistor and a pull-down transistor. The first input transistor may be coupled between the pull-up and pull-down transistors in the first inverting circuit. The second input transistor may be coupled between the pull-up and pull-down transistors in the second inverting circuit. The reset transistors may be coupled in parallel with the pull-up transistors and may receive a clock signal. The current pulse generator may receive the clock signal and generate current pulse signals in response to detecting edges in the clock signal. Latched comparator circuitry configured and operated in this way can provide reduced clock kickback noise.

Latched comparator circuitry with reduced clock feedthrough

A dual stage power converter and a method for charging an energy storage device are presented. The dual stage power converter has a first stage and a second stage arranged in series. A first stage has a voltage divider circuit with a flying capacitor to convert an input voltage at an input of the dual stage power converter into a smaller, intermediate voltage at an intermediate node of the dual stage power converter. A second stage has a voltage regulator circuit to receive said intermediate voltage for regulating, using a feedback loop, an output voltage at an output of the dual stage power converter. The described dual stage power converter enables a reduction of the switching power losses in the voltage regulator circuit and a reduction of the resistive power losses within an external cable connecting the dual stage power converter with an external wall adapter.

Dual stage battery charger

A power converter comprises a high side switching element and a low side switching element arranged in series between an input terminal of the power converter and a reference terminal. A first feedback circuit of the power converter is configured to control an output voltage or an output current at an output terminal of the power converter. The first feedback circuit comprises a first comparator configured to generate a first control signal for controlling the switching of the switching elements by comparing a first error voltage with a first ramp signal. A second feedback circuit of the power converter is also configured to control said output voltage or said output current. The second feedback circuit comprises a second comparator configured to generate a second control signal by comparing a second error voltage with a second ramp signal. A selective clamping unit is configured to determine if the first error voltage is larger than the second error voltage, and to reduce the first error voltage if it is determined that the first error voltage is larger than the second error voltage.

Direct charging with mutual active clamp

A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a voltage indicative of a current flowing into the inductor into an indicator current. A peak current detector receives the indicator current to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current. The peak current detector compares the calibrated indicator current with a threshold value for detecting a more precise peak current flowing into the inductor, taking into account the effects of temperature or circuit aging.

Peak current detection for compensating errors in a power converter

A switching mode power converter circuit is disclosed, comprising a first high-side switch and a first low-side switch coupled in series between an input voltage level and a reference voltage level, a second high-side switch and a second low-side switch coupled in series between the input voltage level and the reference voltage level, and a control circuit for controlling switching operation of the first and second high-side switches and the first and second low-side switches. The first high-side switch has a larger on-state resistance than the second high-side switch and the first low-side switch has a larger on-state resistance than the second low-side switch. The control circuit is configured to, during an on-state of the first and second low-side switches, control the second low-side switch to switch to the off-state and control the first high-side switch to switch to the on-state, so that the first high-side switch and the first low-side switch are both in the on-state. The application further relates to a method of operating such switching mode power converter circuit.

Reverse recovery charge elimination in DC/DC power converters

A switching mode power converter circuit and a method are presented. The circuit comprises a first transistor switch and a second transistor switch coupled in series between an input voltage level and ground. There is a control circuit for controlling switching operation of the first transistor switch and the second transistor switch. There is a detection circuit for sensing a voltage at an intermediate node arranged between the first transistor switch and the second transistor switch, for deriving an indication of a slope of the sensed voltage, and for generating a switching control signal for the control circuit on the basis of the derived indication of the slope of the sensed voltage. The control circuit sets a first timing for activating the first transistor switch and/or a second timing for activating the second transistor switch on the basis of the switching control signal.

Nulling reverse recovery charge in DC/DC power converters

A DC-DC converter comprises an oscillator and a charge pump, to ensure operation at low voltage. The oscillator comprises one or more source degenerated transistors comprising a degeneration impedance located between a source of the transistor and a ground connection. The degeneration impedance comprises an inductor and a capacitor. Also provided is an energy harvesting device comprising such a DC-DC converter.

Low power DC-DC converter

The present document relates to DC/DC converters with a modular structure for providing different levels of output currents. A power converter configured to convert electrical power at an input voltage into electrical power at an output voltage is described. The power converter comprises inverter stages with half bridges comprising a high side switches and low side switches which are arranged in series between the input voltage and a reference voltage; and with high side drivers for providing drive signals for the high side switches, subject to a high side control signals at a drive voltage level. In addition, the power converter comprises a level shifting unit configured to convert a high side control signal at a logic voltage level into the high side control signal at the drive voltage level for driving the high side switches.

High voltage DC/DC converter with master/slave output stage

The present document relates to efficient DC/DC converters with a modular structure for providing different levels of output currents. A controller for controlling a power converter which is configured to convert electrical power at an input voltage into electrical power at an output voltage is described. The power converter comprises first and second inverter stages comprising high side switches and low side switches which are arranged in series between the input voltage and a reference voltage. The midpoints between the high side switches and the low side switches are coupled. The electrical power at the output voltage is drawn from the midpoint. The controller is configured to determine an indication of a requested level of the electrical power at the output voltage, and to activate or deactivate the second inverter stage based on the indication of the requested level of the electrical power at the output voltage.

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Leghorn, Italy

Francesco Dalena