Stmicroelectronics S.a.

François Wacquant

Christophe Regnier

Philippe Coronel

Thomas Skotnicki

Jessy Bustos

Benoît Froment

Brice Tavel

A process for forming portions of a compound material within an electronic circuit includes the formation of a cavity having at least one opening facing onto an access surface. The cavity furthermore has an internal wall with at least one region made of an initial material (for example, silicon). A metal is deposited close to the region of initial material. The circuit is then heated to form a portion of the compound material (for example, a silicide) in the region of initial material inside the cavity. The compound material is formed from elements of the initial material and from some of the metal deposited. The excess metal that has not formed some of the compound material is then removed from the cavity.

Process for forming portions of a compound material inside a cavity

A process for producing an electronic component includes covering a substrate with a portion defining, with the substrate, a volume at least partly filled with a temporary material. The temporary material is then removed via chimney for access to said volume. A deposition of a fill material is then made in said volume, the fill material being obtained from precursors supplied via the chimney. The process is particularly suitable for producing a gate of an MOS-type transistor. In this case, the fill material is conducting or semiconducting, and an electrically insulating coating material may also be deposited in said volume before the (semi) conducting fill material. The process also includes defining a trench in a substrate filled with a temporary material. The filled trench is then covered with a circuit portion. The temporary material is then removed via a chimney for access to the trench. A deposition of low dielectric fill material is then made in the trench.

Process for producing an integrated electronic component

A method for the selective formation of a suicide on a slice of semiconductor material that comprises exposed regions to be silicided and exposed regions not to be silicided, comprising the following steps: a) forming a resist thin mask on top of the regions not to be silicided; b) implanting ions wafer-scale through said mask so as to form beneath the resist layer an implantation residue layers using the resist layer; c) removing the resist layer; d) depositing conformally a metal layer on the wafer; e) performing rapid heat treatment so as to form a silicide by siliciding the metal deposited at step d); and f) removing the metal that has not reacted to the heat treatment of step e).

Method for the selective formation of a silicide on a wafer using an implantation residue layer

A semiconductor material is protected against the formation of a metal silicide by forming a layer of a silicon/germanium alloy on the material. The material which is protected belongs to a component of an integrated circuit comprising other components that have to be subjected to a siliciding operation. The method of protection includes depositing a layer of silicon/germanium alloy on the integrated circuit. The layer of silicon/germanium alloy is then removed from the areas to be silicided. A metal is then deposited on the structure and a metal silicide is formed therefrom. The unreacted metal and the metal/silicon/germanium ternary alloy that may have formed are removed, and the layer of silicon/germanium alloy is removed so as to expose the unsilicided component.

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Saint Ismier, France

François Wacquant