University of California

Ayar Labs, Inc.

Forrest G Sedgwick

Roy Edward Meade

Connie J Chang-Hasnain

John Fini

Chen Sun

Alexandra Carroll Wright

Anatol Khilo

Shahab Ardalan

Wai Son Ko

Christopher Chase

Vadim Karagodsky

Derek Van Orden

Chih-Wei Chuang

Michael Chung-Yi Huang

Ye Zhou

Kar Wei Ng

Fanglu Lu

Roger Chen

Weijian Yang

Thai-Truong Du Tran

A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

Systems and methods for wafer-level photonic testing

An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

Photonic systems to enable top-side wafer-level optical and electrical test

Photonics systems to enable top-side wafer-level optical and electrical test

A grating coupler reflector (retro reflector) is formed within a photonics chip and includes a vertical scattering region, an optical waveguide, and a reflector. The optical waveguide is optically coupled to the vertical scattering region. The reflector is positioned at an end of the optical waveguide. The reflector is configured to reflect light that propagates through the optical waveguide from the vertical scattering region back toward the vertical scattering region. The location of the grating coupler reflector on the photonics chip is determinable by scanning a light emitting active optical fiber over the chip and detecting when light is reflected back into the active optical fiber from the grating coupler reflector. The determined location of the grating coupler reflector on the photonics chip is usable as a reference location for aligning optical fiber(s) to corresponding optical grating couplers on the photonics chip.

Retro reflector and associated methods

Monolithically integrated optical resonators are disclosed. An optical resonator may be a nanopillar optical resonator that is formed directly on a substrate and promotes a helically-propagating cavity mode. The helically-propagating cavity mode may result in significant reflection or, total internal reflection at an interface of the nanopillar optical resonator and the substrate even if refractive indices of the nanopillar optical resonator and the substrate are the same or similar. As a result, strong optical feedback, and thus strong resonance, may be provided in the nanopillar optical resonator.

Nanopillar optical resonator

The present disclosure provides a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400&#xb0; C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (&#x3bc;m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6&#xb0; to 9&#xb0; tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.

Nanoneedle plasmonic photodetectors and solar cells

Planar lenses and reflectors are described comprising subwavelength high-contrast gratings (HCG) having high index of refraction grating elements spaced apart from one another in straight and/or curved segments and surrounded by low index material. The high-contrast grating is configured to receive an incident wave which excites multiple modes within the high-contrast grating and is focused for reflection and/or transmission by said high contrast grating. The width of the high contrast grating bars vary along a distribution direction of the grating bars which is perpendicular to the length of the grating bars and/or varies along the length of one or more grating bars to focus said reflection and/or transmission. The HCG is configured to provide double focusing, whose use is exemplified within a vertical cavity surface emitting laser (VCSEL) structure using focusing HCG structures for both the top and bottom mirrors.

Planar, high NA, low loss transmitting or reflecting lenses using sub-wavelength high contrast grating

A saturable absorber (SA) based on a high-contrast grating (HCG) having a buried layer of quantum structures for absorption, and which is particularly well suited for use in a mode-locked application. The HCG-SA provides three times the bandwidth compared with traditional DBR structures, while exhibiting a lower saturation fluence due to the field enhancement inside the grating. Varying grating bar width over one or two axis provides lensing effects on the optical output, while chirping of the period and duty cycle changes optical phase relationships. Novel VCSEL embodiments with external or internal cavities are described using the HCG-SA.

High contrast grating based saturable absorber for mode-locked lasers and its applications in passively mode-locked vertical-cavity surface-emitting lasers

Optical waveguides using segmented periodically-spaced high contrast gratings bounding a hollow core propagation region on at least two sides. Incident light is received in a hollow waveguide (HW) region (core) between opposing HCG faces which provide lateral confinement in response to glancing reflections of the incident light beam from high refractive index segments of the HCG as it traverses the core. Embodiments are described for planar waveguides (1D) having a planar core between two planar HCGs, as well as 2D waveguides, such as having rectangular segments of the HCG through which light is propagated. Additionally, other configurations of HCG-HW, including those having arbitrary incidence and azimuth, angled HCG segments, propagation in a direction which is transverse, or alternatively parallel, to the segments of the HCG.

Growing community of inventors

Berkley, CA, United States of America

Forrest G Sedgwick