Dell Products Inc.

Forrest E Norrod

Jimmy Doyle Pike

Mukund Purshottam Khatri

Paul Dennis Stultz

Orin Michael Ozias

James Arthur Brewer

Michael David Shepherd

Barry S Travis

Tom L Newell

Michael Sheperd

Paul D Stultz

In accordance with the present disclosure, a system and method are herein disclosed for managing memory defects in an information handling system. In an information handling system, a first quantity of memory, such as RAM, may contain defective memory elements. A second quantity of memory is physically coupled to the first quantity of memory and is used to store a memory defect map containing information regarding the location of defective memory elements in the first quantity of memory. The memory defect map may then be referenced by the BIOS or the operating system to preclude use of regions of memory containing defective memory elements.

System and method for implementing a memory defect map

A system and method are herein disclosed for managing memory defects in an information handling system. More particularly, a system and method are described for generating a usable memory map which excludes memory locations containing defect memory elements. In an information handling system, a memory defect map, which contains information about the location of defective memory elements, is coupled to the memory device. As a map of memory usable by the system is created, usable memory regions containing defective memory elements are excluded from the memory map. The memory map is passed to the operating system, which uses only those regions of memory designated as usable and non-defective.

System and method for using a memory mapping function to map memory defects

A method for storing a memory defect map is disclosed whereby a memory component is tested for defects at the time of manufacture and any memory defects detected are stored in a memory defect map and used to optimize the system performance. The memory defect map is updated and the system's remapping resources optimized as new memory defects are detected during operation.

Method for creating a memory defect map and optimizing performance using the memory defect map

A method for handling memory defects during the POST phase and memory calibration in single processor and multiprocessor information handling systems is disclosed whereby information regarding the location of a known memory defect is utilized to optimize the performance of an information handling system. Memory defects within system memory are identified and replaced during operation with error free memory space.

System and method for managing memory errors in an information handling system

A computer and a method according to which an assembly is provided for electrostatically moving air for cooling the interior of the computer. The assembly includes an ionization strip for selectively receiving high voltage, such that when the high voltage is applied to the ionization strip, charged air rushes toward a heat sink disposed in the computer, thereby creating an airflow through the heat sink.

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Austin, TX, United States of America

Forrest E Norrod