Mediatek Corporation

Fong-Wen Lee

Yu-Hsin Lin

Wen-Chieh Wang

Kuan-Ta Chen

An amplification circuit with a common-mode voltage compensation circuit is shown. The common-mode voltage compensation circuit has a first compensation resistor coupled between an input terminal of a loop filter of the amplification circuit and a control node, and a second compensation resistor coupled between another input terminal of the loop filter and the control node. The control node is coupled to a power ground voltage when the two output signals of the amplification circuit are high, and it is coupled to a power supply voltage when the two output signals of the amplification circuit are low.

Amplification circuit with compensation for common-mode voltage fluctuation

The present invention provides a quadrature phase detector including a detection circuit. The detection circuit includes a first switch, a second switch and a first filter, wherein the first switch is controlled by a second clock signal to selectively couple a first clock signal to a first node, the second switch is controlled by the second clock signal to selectively coupled the first node to a reference voltage, and the first filter is configured to filter voltages at the first node to generate a first detection result.

Low power quadrature phase detector

The present invention provides a filtering circuit comprising a poly phase filter and a quadrature phase detector. The poly phase filter comprises a first path, a second path, a third path and a fourth path. The first path is configured to receive a first input signal to generate a first clock signal. The second path comprising a first adjustable delay circuit is configured to receive the first input signal to generate a second clock signal. The third path comprising a second adjustable delay circuit is configured to receive a second input signal to generate a third clock signal. The fourth path is configured to receive the second input signal to generate a fourth clock signal. The quadrature phase detector is configured to detect phases of these clock signals to generate control signals to control the first adjustable delay circuit and the second adjustable delay circuit.

Poly phase filter with phase error enhance technique

A class-D amplifier with good signal-to-noise ratio (SNR) performance is shown. The class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The class-D amplifier further includes a feedback breaker. The feedback breaker breaks the feedback path in response to conditions in which there no-signal information in the class-D amplifier.

Class-D amplifier with high dynamic range

A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

High-linearity differential to single ended buffer amplifier

A class-D amplifier with low pop-click noise is shown. A loop filter, a control signal generator, a first power driver, and a first feedback circuit are provided within the class-D amplifier to establish a first loop for signal amplification. The class-D amplifier further has a settling circuit and a pre-charging circuit. The settling circuit is configured to be combined with the loop filer and the control signal generator to establish a second loop to settle the loop filter and the control signal generator before the first loop is enabled. The pre-charging circuit is configured to pre-charge a positive output terminal and a negative output terminal of the first power driver.

Low pop-click noise class-D amplifier

The present invention provides a differential to single-ended converter including a first input node, a second input node, an operational amplifier and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the first terminal of the operational amplifier receives a first signal from the first input terminal, and the second terminal of the operational amplifier receives a second signal from the second input terminal. The feedback circuit is configured to receive an output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce a swing of the first signal, and generate a second feedback signal to the second terminal of the operational amplifier to balance noises induced by the feedback circuit and inputted to the first terminal and the second terminal.

Low-noise differential to single-ended converter

An analog-to-digital converter with noise elimination is disclosed. The analog-to-digital converter converts a single-ended analog input into digital representation, and comprises an input buffer and an analog-to-digital conversion module. The input buffer outputs a positive differential signal and a negative differential signal based on the single-ended analog input. The analog-to-digital conversion module receives the positive differential signal and the negative differential signal to generate the digital representation. The input buffer further transmits a noise compensation signal to the analog-to-digital conversion module. The noise compensation signal contains noise information about noise transmitted from the input buffer to the analog-to-digital conversion module through the positive differential signal and the negative differential signal. The analog-to-digital conversion module uses the noise compensation signal to compensate for the noise transmitted from the input buffer to the analog-to-digital conversion module through the positive differential signal and the negative differential signal.

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Hsinchu, Taiwan

Fong-Wen Lee