Infineon Technologies Ag

Florian Brugger

Alexander Mayer

Mario Motz

Tobias Werth

Carlos Humberto Garcia Rojas

Robert Illing

Bernhard Schaffer

Luca Petruzzi

Christian Djelassi

Christian Djelassi-Tscheck

Christoph Schroers

Mario Tripolt

Francesco Polo

Ioan-Alexandru Tranca

Wolfgang Milachowski

The present disclosure relates to circuits for detecting a line short circuit and/or a line interruption in a differentially operated line network, comprising at least one control circuit configured to control at least one common-mode signal of the differentially operated line network vis-à-vis a predefined common-mode signal variable and to indicate a line short circuit and/or a line interruption in the differentially operated line network if at least one control or controlled variable of the control circuit exceeds a predefined threshold value.

Circuits and methods for detecting line short circuits and/or line interruptions in differentially operated line networks

Apparatuses and methods for analog-digital conversion and corresponding systems having a sensor and an apparatus of this type are provided. Demodulation is executed with no variable preamplification, followed by continuous-time analog-digital conversion, at least in time segments, which further employs chopper techniques.

Analog-digital converter apparatus, sensor system and method for analog-digital conversion

A current sensing circuit includes load transistors having a current path coupled between a power terminal and corresponding load terminals, sense transistors having a current path coupled between the power terminal and corresponding sense terminals, each sense transistor being coupled to a respective load transistor, N-channel transistors having a current path coupled between a respective sense transistor and a respective sense terminal, an amplifier for selectively equalizing the voltages across one of the load transistors and one of the sense transistors, and bypass circuits coupled to a bulk terminal of the N-channel transistors.

Robust current sensing during inverse current load conditions

A method of converting an N-bit digital code into analog output currents includes switchably connecting a first number of PN junctions to a positive output terminal and a second number of PN junctions to a negative output terminal based on the N-bit digital code; and switchably connecting a plurality of additional PN junctions to the positive output terminal and the negative output terminal based on the N-bit digital code, including connecting a first number of additional PN junctions to the positive output terminal based on the N-bit digital code and connecting a second number of additional PN junctions to the negative output terminal based on the N-bit digital code such that a first sum of the first number of PN junctions and the first number of additional PN junctions is equal to a second sum of the second number of PN junctions and the second number of additional PN junctions.

Leakage compensation for analog decoded thermometric digital-to-analog converter (DAC)

A circuit comprises a first metal-oxide semiconductor, MOS, power transistor having a first gate terminal, a first drain terminal, and a first source terminal, a second MOS power transistor having a second gate terminal, a second drain terminal, and a second source terminal, and a switch connected in-between the first gate terminal and the second gate terminal and configured to selectively couple the first gate terminal and the second gate terminal.

MOS power transistors in parallel channel configuration

According to an embodiment, a fault protection system includes a first power supply terminal, a second power supply terminal, an error circuit configured to receive a power supply signal, and a power supply circuit coupled to the error circuit, the first power supply terminal, and the second power supply terminal. The power supply circuit is configured to provide the power supply signal from the first power supply terminal during a first operation mode and provide the power supply signal from the second power supply terminal during a second operation mode.

System and method for a fault protection circuit

A circuit is suggested comprising an electronic switching element, a logic unit coupled to control the electronic switching element, and a counter unit coupled to the logic unit, wherein the counter unit comprises a counter and an internal power supply.

Growing community of inventors

Villach, Austria

Florian Brugger