International Business Machines Corporation

Filipp Akopyan

Dharmendra S Modha

John Vernon Arthur

Myron Dale Flickner

Andrew S Cassidy

Jun Sawada

Pallab Datta

Steven Kyle Esser

Rathinakumar Appuswamy

Brian Taba

Jennifer Klamo

Carlos O Otero

A neural inference chip is provided, including at least one neural inference core. The at least one neural inference core is adapted to apply a plurality of synaptic weights to a plurality of input activations to produce a plurality of intermediate outputs. The at least one neural inference core comprises a plurality of activation units configured to receive the plurality of intermediate outputs and produce a plurality of activations. Each of the plurality of activation units is configured to apply a configurable activation function to its input. The configurable activation function has at least a re-ranging term and a scaling term, the re-ranging term determining the range of the activations and the scaling term determining the scale of the activations. Each of the plurality of activations units is configured to obtain the re-ranging term and the scaling term from one or more look up tables.

Efficient method for VLSI implementation of useful neural network activation functions

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New Windsor, NY, United States of America

Filipp Akopyan