Freescale Semiconductor,inc.

Fernando Chavez Porras

Jon Scott Choy

Fernando Zampronho Neto

Walter Luis Tercariol

Walter Luis L Tercariol

Jung Hyun Choi

A compare cycle of a comparator includes a precharge phase and a compare phase. During the precharge phase, a node of the comparator is precharged to a defined voltage. In addition, during the precharge phase an input transistor of the comparator is decoupled from the node. During the compare phase, an input voltage is coupled to the node via the input transistor. The input transistor is maintained in saturation during both the precharge phase and the compare phase, reducing switching noise.

Latched comparator and methods therefor

A charge pump system () includes a charge pump (), and a regulator () that includes a clock generator () for providing a clock signal, a control logic () coupled to the clock generator, and a comparator () coupled to an output of the charge pump. The comparator includes a plurality of interleaved latches (and) driven by a single differential () stage that compares the output voltage and a reference voltage. The control logic provides timing signals to cause each latch to perform a latch action at different points in time within each period of the clock signal, each point in time equally spaced apart. An output from each latch is coupled to an output stage (). An output signal from the output stage regulates an output voltage from the charge pump. In one embodiment, the charge pump is coupled to a flash memory ().

Regulator having interleaved latches

A low power servo-controlled single clock ramp generator () includes a fast switched comparator (), charge pump () and voltage-to-current converter () connected to provide a feedback control mechanism under control of a pulse comparison clock signal (pulse_comp) and a reset pulse clock signal (rst_pulse) that are generated from a single input clock signal (clkin) so that there are well defined time intervals between pulses in the pulse comparison clock signal and the reset pulse clock signal, thereby providing a ramp signal (Vramp_out) having a stable, frequency-independent amplitude that is not limited by the reference voltage.

Growing community of inventors

Campinas, Brazil

Fernando Chavez Porras