Applied Materials, Inc.

Fernand Dorleans

Jianming Fu

Gongda Yao

Gene Y Kohara

Michael Nam

Sophia Lee

Chris Cha

Edwin Kim

Zheng Xu

John C Forster

Robert B Lowrance

Howard H Tang

Ralf Hofmann

Howard E Grunes

Aihua Chen

James S Van Gogh

Mark Lloyd

Christopher Hagerty

Siyaun Yang

R Steve West

The present invention pertains to a semiconductor device microstructure, and to a method of forming that microstructure, which reduces or prevents junction spiking and to a method of forming that microstructure. In particular, a semiconductor contact microstructure comprises a feature which includes a silicon base and at least one sidewall extending upward from the silicon base. The sidewall includes a silicon portion in contact with the silicon base, where the height of the silicon portion of the sidewall above the silicon base is typically less than about 0.5 &mgr;m. The sidewall also includes at least one portion which comprises a first dielectric material which is in contact with (and typically extends upward from) the silicon portion of the sidewall. Overlying at least the silicon portion of the sidewall is a layer of a second dielectric material, preferably silicon oxide. Typically, a diffusion barrier layer overlies the silicon base, the layer of second dielectric material, and at least part of the sidewall portion which is comprised of the first dielectric material. The method comprises the steps of: a) providing a semiconductor device feature which includes a silicon base and at least one sidewall extending upward from the silicon base, where the sidewall includes at least one silicon portion in contact with the silicon base, and another portion comprising a first dielectric material which is in contact with the silicon portion of the sidewall; and b) creating a layer of a second dielectric material, preferably silicon oxide, over the at least one silicon sidewall portion. The method may include additional steps: c) sputter etching to remove dielectric material from the surface of the silicon base; and d) applying a diffusion barrier material over the silicon base, the layer of second dielectric material, and at least a portion of the sidewall comprising the first dielectric material. Typically, both the first and second dielectric materials are silicon oxide.

Structure for reducing junction spiking through a wall surface of an overetched contact via

The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MN,), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition. The first layer of barrier metal can optionally be annealed to form a silicide of the barrier metal (MSi,) in order to reduce contact resistance and interdiffusion of the silicon and metal/conductor which may result form overetching of contacts. An additional layer of barrier metal can optionally be deposited between the second oxygen-stuffed layer and the third barrier metal nitride layer in order to further improve the barrier properties of the barrier layer structure and to provide for better metal/conductor fill. A thin layer of metal/conductor may be deposited on the walls of the contact via by &ldquo;long throw&rdquo; sputter deposition prior to filling the via with metal/conductor in order to provide more uniform fill. The optimum process conditions for sputter deposition of the barrier layer structure of the invention are disclosed herein.

Sputter deposited barrier layers

The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MN.sub.x), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition. The first layer of barrier metal can optionally be annealed to form a silicide of the barrier metal (MSi.sub.2) in order to reduce contact resistance and interdiffusion of the silicon and metal/conductor which may result form overetching of contacts. An additional layer of barrier metal can optionally be deposited between the second oxygen-stuffed layer and the third barrier metal nitride layer in order to further improve the barrier properties of the barrier layer structure and to provide for better metal/conductor fill. A thin layer of metal/conductor may be deposited on the walls of the contact via by 'long throw' sputter deposition prior to filling the via with metal/conductor in order to provide more uniform fill. The optimum process conditions for sputter deposition of the barrier layer structure of the invention are disclosed herein.

Oxygen enhancement of ion metal plasma (IMP) sputter deposited barrier

A coil shield assembly for an RF field coil in a plasma processing system includes a first shield positioned inside the coil. The first shield has a central opening substantially surrounding a central space of a processing chamber in which the plasma is maintained. At least one slot is formed in the first shield and extends therethrough. A barrier is positioned between the first shield and the coil and spaced apart from the first shield near the at least one slot. The slot permits an RF signal from the coil to couple with the plasma, and the first shield and the barrier are structured and arranged to prevent plasma ions or sputtered material from bombarding the coil by a direct path from the central space and through the at least one slot.

Slotted RF coil shield for plasma deposition system

The disadvantages heretofore associated with the prior art are overcome by the present invention of an improved target for a physical deposition (PVD) system. The improved target has a portion of the target side wall the overhangs and shadows the side wall of the target thus preventing material from depositing on the edge. To further reduce contaminant generation, the improved target is combined with an improved dark space shield having a first end and a second end, where the second end conventionally supports a collimator and the first end has an inner surface that is substantially vertical.

Target and dark space shield for a physical vapor deposition system

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San Francisco, CA, United States of America

Fernand Dorleans