Via Alliance Semiconductor Co., Ltd.

Shanghai Zhaoxin Semiconductor Co., Ltd.

Glenfly Tech Co., Ltd.

Glenfly Technology Co., Ltd.

Fengxia Wu

Yuanfeng Wang

Deming Gu

Zhou Hong

Yi Zhou

Ying Chu Wang

Heng Que

Wei Zhang

Tian Shen

Wenlin Hao

Jiakuan Hu

Lei Li

Huaisheng Zhang

Programmable pixel blending method and apparatus, computer device, storage medium and computer program product are provided. The method includes: performing rasterization on a first triangle, a second triangle, and a third triangle via the raster unit to obtain triangle coverage information of each triangle; sending the triangle coverage information to the warp assembly unit and the warp reorder unit respectively; assembling, by the warp assembly unit, the first triangle and the second triangle into a first warp, and requesting a warp from a warp request interface based on information of the first warp; executing the first warp based on a warp information cache, a warp synchronization unit, the warp reorder unit, the pixel operation unit, the interpolation unit, and the execution unit; after the first warp is executed, continuing to assemble, by the warp assembly unit, the third triangle and completing a rendering of the third triangle.

Programmable pixel blending pipeline, programmable pixel blending method and apparatus, and storage medium

The present disclosure relates to a data process apparatus and a method thereof. The data process apparatus includes an internal memory unit and a shader level-1 cache. The internal memory unit is configured to store a to-be-cached matrix. The to-be-cached matrix includes at least a first element and a second element. The first element and the second element are stored in the internal memory unit in order of elements. The first element is located in a first row of the to-be-cached matrix, and the second element is located in next row of the to-be-cached matrix adjacent to the first row. The shader level-1 cache is connected to the internal memory unit, and configured to acquire the to-be-cached matrix to obtain a to-be-processed matrix stored in order of elements, and store the to-be-processed matrix. The data process apparatus can improve the efficiency of accessing the internal memory unit and reduce the bandwidth occupied by invalid data; enable hardware pipelines to be tighter and reduce idle clock cycles; and enable the shader level-1 cache to be smaller, thereby reducing hardware costs.

Data process apparatus for to-be-cached matrix and method thereof

A graphics processing unit includes a pixel shader, an output merger, a cache, and a memory. The pixel shader is configured to output a pixel data. The output merger is coupled to the pixel shader and configured to receive the pixel data. The output merger outputs the pixel data and a sample mask corresponding to the pixel data. The cache is coupled to the output merger and configured to receive the pixel data and the sample mask. The cache generates a sample data according to the pixel data and the sample mask. The memory is coupled to the cache. The cache writes the sample data into the memory. A data size of the sample data is a multiple of a data size of the pixel data. An operation method thereof is also provided.

Graphics processing unit having pixel shader, output merger, cache, memory and operation method thereof

A data transferring apparatus and a method for transferring data with overlap are provided. The data transferring apparatus includes a command splitter circuit and a plurality of tile processing circuits. The command splitter circuit splits a block level transfer command into a plurality of tile transfer tasks. The command splitter circuit may issue the tile transfer tasks to the tile processing circuits in a plurality of batches. The tile processing circuits may execute the tile transfer tasks in a current batch, so as to read data of a plurality of corresponding tiles among a plurality of source tiles of a source block to the tile processing circuits. After all the tile transfer tasks in the current batch have been executed by the tile processing circuits, the command splitter circuit issues the tile transfer tasks in a next batch of the batches to the tile processing circuits.

Data transferring apparatus and method for transferring data with overlap

A graphics processing unit (GPU) is provided. The GPU includes a command stream parser (CSP). The CSP receives a command list from a display driver and parses commands in the command list to determine a rendering mode of the GPU and perform a graphics rendering pipeline for graphics processing according to the rendering mode. When the CSP determines that at least a specific CSP command is not included in the command list, the CSP determines that the rendering mode is a first rendering mode. When the CSP determines that the specific CSP command is included in the command list, the CSP determines that the rendering mode is a second rendering mode. In the second rendering mode, the CSP divides a rendering target into tiles, obtains first drawing commands from the command list according to the specific CSP command, and executes the first drawing commands for each tile.

Computer system, graphics processing unit, and graphics processing method thereof that are capable of switching different rendering modes

A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.

Computer systems that are able to reduce memory data flow and graphics processing methods thereof

A graphics processing unit (GPU) is provided. The GPU includes a command stream parser (CSP) including a profiling unit used to provide performance statistics data for the GPU to determine a rendering mode of the GPU, wherein the rendering mode includes a first rendering mode and a second rendering mode for performing a graphics rendering pipeline for graphics processing. The profiling unit calculates drawing time of frames and the number of objects in the frames when the GPU operates in the first rendering mode, and determines whether the operation of the GPU is switched to the second rendering mode according to the calculated drawing time and the number of objects; when determining that the calculated drawing time and the number of objects are less than their respective thresholds, the CSP causes the operation of the GPU to switch from the first rendering mode to the second rendering mode.

An apparatus for enqueuing kernels on a device-side is introduced to incorporate with at least a MXU (Memory Access Unit) and a CSP (Command Stream Processor): The CSP, after receiving a first command from the MXU, executes commands of a ring buffer, thereby enabling an EU (Execution Unit) to direct the MXU to allocate space of the ring buffer for a first hardware thread and subsequently write second commands of the first hardware thread into the allocated space of the ring buffer according to an instruction of a kernel.

Apparatuses for enqueuing kernels on a device-side

A method for improving image quality is provided. The method includes: receiving an image data and sensing information; dividing the image data into areas corresponding to different resolutions according to first parameter information, wherein the different resolutions correspond to different frequencies; rendering the areas in a single pass according to the sensing information and the different frequencies and outputting a rendered image data; and resolving the rendered image data into a final output image data with a first resolution according to second parameter information.

Method and virtual reality device for improving image quality

A graphics processing unit and associated graphics processing method are provided. The graphics processing unit includes: an execution unit, for performing shader execution and texture loading; a fixed-function unit, for executing a graphics rendering pipeline; a memory-access unit; a texture unit, for reading texture data from a memory via the memory-access unit according to the data requirement of the execution unit or the fixed-function unit; and a command stream parser, for receiving a draw command from a display driver, and transmitting the draw command to the execution unit or the fixed-function unit to perform graphics processing according to the type of draw command. When the command stream parser determines that the draw command is a specific draw command, the command stream parser transmits the draw command only to the fixed-function unit to perform graphics processing, and turns off power to the execution unit.

Low-power graphics processing using fixed-function unit in graphics processing unit

A device for image processing includes a first queue, a second queue, a cache, and a processor. The first queue is capable of receiving a first image tile. The processor is electrically connected to the first queue, the second queue, and the cache, respectively. The processor is capable of obtaining the first image tile from the first queue and obtaining mask information of the background mask corresponding to the first tile from the cache. The processor determines the relationship between the first image tile and the background mask based on the first image tile and the mask information so as to selectively transfer the first image tile to the second queue.

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Shanghai, China

Fengxia Wu