Boe Technology Group Co., Ltd.

Hefei Boe Optoelectronics Technology Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Fengjing Tang

Hongmin Li

Ying Wang

Wei Xue

Jian Tao

Dong Wang

Li Sun

Zhifu Dong

Liqing Liao

Silin Feng

Meng Li

Jie Gao

Zhaoke Zhang

A display panel includes a driving circuit and a signal line. The signal line includes at least two main signal sub-lines each including a first end and a second end, the first ends of the at least two main signal sub-lines are electrically coupled to each other, and the second ends thereof are electrically coupled to each other. N main signal sub-lines in the at least two main signal sub-lines are directly electrically coupled to the driving circuit. Each of the N main signal sub-lines is a direct-coupled main signal sub-line, and a main signal sub-line in the at least two main signal sub-lines other than the direct-coupled main signal sub-lines is an indirect-coupled main signal sub-line which is not directly electrically coupled to the driving circuit but electrically coupled to the driving circuit via the direct-coupled main signal sub-line, where N is a positive integer.

Display panel and display device

An array substrate and a reflective display substrate are disclosed. The array substrate includes a base, and a plurality of data lines and a plurality of sub-pixels that are disposed on the base. The sub-pixel includes a reflective pixel electrode and a TFT. An orthographic projection of the pixel electrode in each sub-pixel on the base is overlapped with orthographic projections of a first electrode, a first data line and a second data line.

Array substrate and reflective display panel

The present disclosure is related to a shift register circuit. The shift register circuit may include a shift output circuit and N driving output circuits. N is an integer larger than 1. Among the N driving output circuits, an i-th driving output circuit may be respectively coupled to an i-th driving clock signal terminal of N driving clock signal terminals, a pull-up node of the shift output circuit, and an i-th driving output terminal of N driving output terminals. The i-th driving output circuit may be configured to input an i-th driving clock signal from the i-th driving clock signal terminal to the i-th driving output terminal under a control of the pull-up node, wherein i is a positive integer not greater than N.

Shift register circuit, driving method thereof, gate driving circuit, and display apparatus

A shift register unit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register unit includes: an input circuit, an output circuit, a pull-down control circuit and a pull-down circuit; and the output circuit is connected to a first DC power supply terminal, a second clock signal terminal, a pull-up node, a first driving signal output terminal and a second driving signal output terminal respectively, and is configured to output a first power supply signal of the first DC power supply terminal to the first driving signal output terminal under control of the pull-up node.

Shift register unit, driving method thereof, gate drive circuit and display device

The present disclosure provides a shift register unit, including an input sub-circuitry, a pull-up node control sub-circuitry, a pull-down node control sub-circuitry, a gate driving output sub-circuitry and a carry signal output sub-circuitry. The input sub-circuitry is connected to an input end, a second clock signal input end and a pull-up node. The pull-up node control sub-circuitry is connected to the pull-up node, a pull-down node, a first clock signal input end and a first voltage input end. The pull-down node control sub-circuitry is connected to the pull-down node, the pull-up node, the first clock signal input end, the first voltage input end and a second voltage input end.

Shift register unit, driving method, gate driving circuit and display device

The present application discloses a touch control array substrate having a plurality of subpixel areas. The touch control army substrate includes a base substrate; an array of a plurality of touch electrode blocks on the base substrate; a plurality of touch signal lines respectively electrically connected to the plurality of touch electrode blocks; and a plurality of auxiliary conductive lines. A first touch electrode block of the plurality of touch electrode blocks is electrically connected to at least a first auxiliary conductive line of the plurality of auxiliary conductive lines at at least two different portions of the first touch electrode block.

Touch control array substrate having a plurality of auxiliary conductive lines, and display apparatus thereof

A shift register unit, a driving method, a gate drive circuit and a display device are provided. The shift register unit includes: an input sub-circuit used to control an electric potential of the pull-up node, an output sub-circuit used to input a first clock signal from a first clock signal terminal to the output terminal, a pull-down control sub-circuit used to control an electric potential of the pull-down node, a pull-down sub-circuit used to control electric potentials of the pull-up node and the output terminal, a first reset control sub-circuit used to control an electric potential of the second control node under control of the first control node and a reset signal from the reset signal terminal and a reset sub-circuit used to control the electric potential of the pull-up node. The shift register unit improves the noise reduction efficiency at the output terminal.

Shift register unit, driving method, gate drive circuit, and display device

A shift register, a method for driving the same, a gate drive circuit and a display device are provided. The shift register includes a write circuit, a pull-down control circuit and an output circuit. The write circuit is configured to write a write signal provided by a write signal input terminal to a pull-up node. The pull-down control circuit is configured to write a first operating voltage provided by a first power supply terminal to a pull-down node, and write a first clock signal to the pull-down node. The output circuit is configured to write a drive signal provided by a drive signal input terminal to a drive signal output terminal, and write a second operating voltage provided by a second power supply terminal to the drive signal output terminal.

Shift register, method for driving the same, gate drive circuit and display device

A shift register and a driving method thereof, a gate drive circuit and a display device are provided. The shift register may comprise a transmission sub-circuit, a storage sub-circuit and an output control sub-circuit. The shift register may further comprise an output buffer sub-circuit and a reset sub-circuit. The gate drive circuit may comprise a plurality of cascaded shift registers as described above. The display device may comprise the gate drive circuit. The present disclosure guarantees the working stability, use reliability and display effect of a display panel.

Shift register and driving method thereof, gate drive circuit and display device

The disclosure relates to a shift register unit, a driving method of shift register units, a gate driving circuit and a display panel. The shift register unit includes: an input module, a pull-up module, a storage capacitor, an output module configured to transmit a first voltage signal to a signal output terminal under the control of the first voltage signal; and an output control module configured to transmit the first voltage signal or a second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a first selection signal, and to transmit the first voltage signal or the second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a second selection signal.

Shift register unit and driving method thereof, gate driving circuit and display panel

The present disclosure provides a shift register unit. The shift register unit includes an input module, an output module and an output control module. The input module is connected to an input signal terminal, a first power supply signal terminal and a pull-up node, and is configured to transmit a first power supply signal to the pull-up node. The output module is connected to the pull-up node, a clock signal terminal and an output control node, and is configured to transmit a clock signal to the output control node. The output control module is connected to the output control node, the clock signal terminal and a signal output terminal, and is configured to transmit a signal of the output control node to the signal output terminal under the control of the clock signal.

A shift register and a method for driving the same, a gate driving circuit and a display device. The shift register includes: an input sub-circuit configured to provide a signal at the signal input terminal to the pull-up node under control of the first clock signal terminal; an output sub-circuit configured to provide a clock signal at the second clock signal terminal to the signal output terminal under control of the pull-up node; and a pull-down sub-circuit configured to provide a signal at the power supply terminal to the signal output terminal under control of the third clock signal terminal.

Shift register and method for driving the same, gate driving circuit and display device

A shift register circuit includes an input terminal, a reset terminal, a first scan voltage terminal, a second scan voltage terminal, a first reference voltage terminal, a second reference voltage terminal, a clock terminal, an output terminal, an input circuit, a first control circuit, a second control circuit, and an output circuit. The first control circuit is configured to supply a second reference voltage applied at the second reference voltage terminal to a first node and bring the second reference voltage terminal into conduction with the output terminal in response to a second node being at an active potential. The second control circuit is configured to supply a first reference voltage applied at the first reference voltage terminal to the first node and bring the first reference voltage terminal into conduction with the output terminal in response to a third node being at an active potential.

Shift register circuit, driving method thereof, gate driver and display panel

The embodiments of the present disclosure disclose a shift register, a driving method thereof, a gate driving circuit and a display apparatus. The shift register includes a pull-up sub-circuit, an output sub-circuit and a touch and hold sub-circuit, wherein the touch and hold sub-circuit is electrically connected to a first touch signal terminal, a second touch signal terminal, a second node, a second power supply terminal, and a second output terminal, and is configured to store a potential at the second node and output the potential at the second node to the second output terminal under control of signals from the first touch signal terminal and the second touch signal terminal.

Growing community of inventors

Beijing, China

Fengjing Tang