University of Electronic Science and Technology of China

Feng Tan

Hao Zeng

Lianping Guo

Duyu Qiu

Huiqing Pan

Jun Jiang

Peng Ye

Qinchuan Zhang

Kuojun Yang

Wuhuang Huang

Yu Li

Yong Zhao

Luonan Zheng

Shuhao Wu

Xiaoman Jiao

Xianggong Guo

Xingqi Liu

The present invention provides a method for equivalent high sampling rate FIR filtering based on FPGA, first, the coefficients h(k) of FIR filter are found by using MATLAB, multiplied by an integer and then rounded for the purpose that the rounded coefficients h(k) can be directly used into a FPGA, then the ADC's output of high data rate fs is lowered by dividing the ADC's output x(n) into M parallel data streams xi(n) of low data rate, and the M&#xd7;L samples in one clock cycle is obtained by delaying the M parallel data streams xi(n) simultaneously by 1, 2, . . . , L' periods of the synchronous clock, at last, the samples yi(n) of FIR filtering output is calculated according to the samples selected from the M&#xd7;L samples, and the filtered data y(n) of data rate fs is obtained by putting the samples yi(n) together in ascending order of i. Thus, the continuous FIR filtering of an ADC's output sampled with high sampling rate is realized, while the data rates before and after the FIR filtering are unchanged.

Method for equivalent high sampling rate FIR filtering based on FPGA

The present invention provides a method and apparatus for automatically adjusting the hold-off time of a DSO based on real-time cycle measurements of the system trigger signal: obtaining a cycle sequence by measuring the system trigger signal, the maximum cycle and minimum cycle, then judging the difference of the maximum cycle and minimum cycle: if the difference is greater than a threshold set by user, setting the hold-off time to the maximum cycle, the minimum cycle or the median cycle, then returning; otherwise terminating the adjustment of the hold-off time. At this point, the hold-off time is correctly set. Therefore, the present invention reduces the complexity and time consumption of the hold-off adjustment, and allows the test signal to be quickly and stably displayed on screen of DSO, meanwhile, which makes the trigger adjustment of DSO more convenient.

Method and apparatus for automatically adjusting the hold-off time of a DSO

The present invention provides a method and system for oscilloscope triggering. The power spectrum entropy threshold Gand the singular spectrum entropy threshold Gare obtained by calculating the averages of the power spectrum entropy Hand the singular spectrum entropy Eof the first a waveform data frames respectively. Then, for the waveform data frame x(&#x3c4;) and thereafter, If the power spectrum entropy His greater than power spectrum entropy threshold Gand the singular spectrum entropy Eis greater than the singular spectrum entropy threshold G, the waveform data frame x(&#x3c4;) is an abnormal signal, the second trigger occurs, storing and displaying the waveform data frame. Thus the storage and display of abnormal signal is realized.

Method and system for oscilloscope triggering

A method for oscilloscope 3D mapping in scan mode. The input signal is acquired using a real-time sampling rate which is Dtimes higher, thus more sampling points, i.e. Dacquired data can be obtained during the time interval between two consecutive horizontal pixels. The Dacquired data are mapped into a same column of the screen to implement fluorescent waveform display. In addition, to realize the scanning display, a flag X is introduced into the three-dimensional database, when the screen refresh signal arrives, the first Dacquired data are read out from the unread acquired data in FIFO memory. The three-dimensional database is updated from the flag X, which make the leftmost waveform always be the oldest waveform, the rightmost waveform always be the newest waveform. Thus the 3D mapping is realized in scan mode, letting the DSO have a fluorescent waveform display at slow time-base.

Method for oscilloscope 3D mapping in scan mode

The present invention provides a temperature-compensated crystal oscillator based on digital circuit, a closed-loop compensation architecture is employed to realize the high precision compensation of the crystal oscillator. The output frequency f(T) of the TCXO to be compensated is directly connected with the compensation voltage Vc(T) in real time, and the compensation voltage is fed back to the voltage control terminal of the VCXO to be compensated to compensate, so that the output frequency after compensation is equal to the target frequency signal, thus avoiding the frequency shift of output signal caused by temperature hysteresis, i.e. the discrepancy between the temperature acquired by a temperature sensor and the real temperature of the resonant wafer in the prior art.

Temperature-compensated crystal oscillator based on digital circuit

The present invention provides a method for a method for measuring the properties of liquid based on a quartz crystal microbalance sensor, which employs two measurements to obtain two frequency shifts of the QCM sensor induced by two different volume of the sample liquid. The present invention creatively established the relationship between the density and viscosity of sample liquid and the frequency shifts of QCM sensor. With present invention, the density and viscosity of sample liquid can be obtained through two frequency shifts. Comparing to the conventional liquid property measurement. The measuring procedure of present invention are more simple, and the measuring results are more accurate. Moreover, the present invention consumes less volume of sample liquid, and has the features such as online, real time and quantitative.

Method for measuring the properties of liquid based on a quartz crystal microbalance sensor

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Chengdu, China

Feng Tan