Taiwan Semiconductor Manufacturing Comp. Ltd.

Feng-Lun Chen

Yen-Huei Chen

Hidehiro Fujiwara

Haruki Mori

Chien-Chi Tien

Chia-En Huang

Header circuitry for a memory device includes multiple backside power rails that form distinct voltage sources for a plurality of switching devices in the header circuitry. The header circuitry includes at least one region of a first conductivity type. A first section in the first region includes one backside power rail (BPR) that forms a first voltage source that provides a first voltage. A second section in the same first region includes another BPR that forms a second voltage source that provides a second voltage that is different from the first voltage.

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Hsinchu, Taiwan

Feng-Lun Chen