Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Boe (hebei) Mobile Display Technology Co., Ltd.

Feng Guan

Zhi Hu Wang

Guangcai Yuan

Zhanfeng Cao

Jianhua Du

Zhaohui Qiang

Xue Dong

Lei Chen

Qi Yao

Chao Li

Yupeng Gao

Zhengliang Li

Chen Hui Xu

Xiaolong He

Yang Lv

Wei Wang

Feng Zhang

Jifeng Tan

Bin Zhang

Ce Ning

Xiaochuan Chen

Shi Shu

Xin Gu

Yanan Niu

Meili Wang

Jikai Yao

Jincheng Gao

Tingting Zhou

Jiushi Wang

Chao Luo

Wei Zhang

Zhen Liu

Kuanjun Peng

Yafeng Yang

Hehe Hu

Hongwei Tian

Yichi Zhang

Xuefei Sun

Wusheng Li

Nianqi Yao

Jie Huang

Jiayu He

Zhi Wang

Woobong Lee

Xueyong Wang

Yang Lyu

Jian Gao

Rui Huang

Wenqing Zhao

Xiandong Meng

Xianqin Meng

Dongsheng Li

Qi Qi

Lu Yu

Yingwei Liu

Zhiwei Liang

Kun Zhao

Wenbo Wang

Ming Zhu

Lu Wang

Zhifu Li

Yan Chen

Ke Wang

Liwei Liu

Xue Ping Liu

Jintao Peng

Yingtao Wang

Xiangchun Kong

Congcong Wei

Qingrong Ren

Jianming Sun

Yaohui Gu

Zhiyuan Ji

He Xu

Yuesheng Song

Donglai Gao

Chunhao Li

An array substrate includes a base substrate, a driving circuit layer, and a functional device layer which are sequentially stacked; the driving circuit layer is provided with first driving circuits, and each first driving circuit at least includes a driving transistor; and the driving circuit layer includes a first gate layer, a first gate insulation layer, a semiconductor layer, a second gate insulation layer, a second gate layer, an interlayer dielectric layer, and a source-drain metal layer which are sequentially stacked on one side of the base substrate.

Array substrate and display panel including electrically connected gates

The disclosure provides a thin-film transistor, a manufacturing method thereof, an array substrate and a display panel, and belongs to the technical field of thin-film transistor devices. The thin-film transistor includes a base substrate, an active layer on the base substrate including a plurality of semiconductor nanowires, and a plurality of guiding projections on the base substrate which extend along a first direction and are arranged at intervals and each of which includes two side walls extending along the first direction, and the semiconductor nanowire extends along a side wall of the guiding projection. In the thin-film transistor, since the semiconductor nanowires are used as the active layer, mobility and concentration of carriers in the thin-film transistor can be effectively increased and therefore performance of the thin-film transistor can be improved. A length of the semiconductor nanowire is not limited, and a size of the thin-film transistor is not limited.

Thin-film transistor, manufacturing method thereof, array substrate and display panel

A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.

Thin film transistor with silicon nanowire channel, display substrate, and display device

Disclosed are an array substrate and a display panel. The array substrate includes: a base substrate; a first thin film transistor on the base substrate; where the first thin film transistor includes: a first gate electrode, a first active layer, a first source electrode, and a first drain electrode; where the first active layer includes: at least one guide structure extending in a first direction; a silicon-based nanowire, disposed on a side of the guide structure facing away from the base substrate; and an extending direction of the silicon-based nanowire is same as an extending direction of the guide structure.

Array substrate and display panel

A thin film transistor is provided. The thin film transistor includes abase substrate; a gate electrode on the base substrate; an active layer on the base substrate, the active layer including a polycrystalline silicon part including a polycrystalline silicon material and an amorphous silicon part including an amorphous silicon material; a gate insulating layer insulating the gate electrode from the active layer; a source electrode and a drain electrode on the base substrate; and an etch stop layer on a side of the polycrystalline silicon part away from the base substrate. An orthographic projection of the etch stop layer on the base substrate covers an orthographic projection of the polycrystalline silicon part on the base substrate, and an orthographic projection of at least a portion of the amorphous silicon part on the base substrate.

Thin film transistor, display apparatus, and method of fabricating thin film transistor

The present disclosure discloses a silicon-based nanowire, a preparation method thereof, and a thin film transistor. By using a eutectic point of catalyst particles and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon, and due to absorption of the amorphous silicon by the molten catalyst particles to form a supersaturated silicon eutectoid, the silicon nucleates and grows into silicon-based nanowires. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide slots under the action of the catalyst particles, and reverse growth of the silicon-based nanowire is restricted by the retaining walls, thus obtaining silicon-based nanowires with a high density and high uniformity. Furthermore, by controlling the size of the catalyst particles and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled.

Silicon-based nanowire, preparation method thereof, and thin film transistor

A thin film transistor includes a gate, a gate insulating layer, an active layer, an ionized amorphous silicon layer, a source and a drain. The gate insulating layer covers the gate. The active layer is disposed on a side of the gate insulating layer away from the gate. The ionized amorphous silicon layer is disposed on a side of the active layer away from the gate, and the ionized amorphous silicon layer is in contact with the gate insulating layer. The source and the drain are disposed on a side of the ionized amorphous silicon layer away from the gate insulating layer, and the source and the drain are coupled to the active layer through the ionized amorphous silicon layer.

Thin film transistor and method for manufacturing the same, array substrate, and display device

This disclosure provides an array substrate, a method for preparing the array substrate, and a display panel. The method includes: forming a first thin film transistor and a second thin film transistor on a base substrate. In the formation of an active layer of the first thin film transistor, by using an eutectic point of the catalyst particle and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon (silicon-based nanowire), and due to absorption of the amorphous silicon by the molten catalyst particle to form a supersaturated silicon eutectoid, the silicon nucleates and grows into a silicon-based nanowire. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide structure under the action of the catalyst particle, thus obtaining a silicon-based nanowire with a high density and high uniformity.

Array substrate, preparation method thereof, and display panel

A display substrate, a display apparatus, and a manufacturing method of the display substrate are provided. The display substrate includes: a base substrate; and a crystallization induction layer and a polysilicon layer stacked on the base substrate. The crystallization induction layer includes induction layer patterns and intervals between the induction layer patterns. The polysilicon layer includes a portion overlapping the induction layer patterns and a portion overlapping the intervals, a crystallinity of the portion of the polysilicon layer overlapping the induction layer patterns is larger than a crystallinity of the portion of the polysilicon layer overlapping the intervals.

Display substrate, display apparatus and manufacturing method of display substrate

The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. In the display substrate of the present disclosure, a first transistor comprises a first gate electrode, a first electrode, a second electrode, and a first active layer; and a second transistor comprises a second gate electrode, a third electrode, a fourth electrode, and a second active layers, wherein the first active layer comprises a silicon material, the second active layer comprises an oxide semiconductor material, and wherein the third electrode and the first gate electrode are disposed in the same layer, and the fourth electrode and the first electrode, the second electrodes are disposed in the same layer.

Display substrate and manufacturing method thereof, display device

The present disclosure relates to a photodiode, a method for preparing the same, and an electronic device. The photodiode includes: a first electrode layer and a semiconductor structure that are stacked, a surface of the semiconductor structure away from the first electrode layer having a first concave-convex structure; and a second electrode layer arranged on a surface of the semiconductor structure away from the first electrode layer, a surface of the second electrode layer away from the first electrode layer having a second concave-convex structure.

Photodiode, method for preparing the same, and electronic device

The present disclosure provides a thin film transistor, a fabricating method thereof, an array substrate, and a display device. The thin film transistor includes: a substrate; a channel region; a heavily doped first semiconductor pattern located on both sides of the channel region; a second semiconductor pattern disposed on the heavily doped first semiconductor pattern; a gate insulating layer covering the channel region and the second semiconductor pattern; a gate pattern disposed on the gate insulating layer, an orthographic projection of the gate pattern on the substrate being within an orthographic projection of the channel region on the substrate; and a source pattern and a drain pattern in contact with the heavily doped first semiconductor pattern through the first via and the second via, respectively.

Thin film transistor and fabricating method thereof, array substrate and display device

The present disclosure relates to a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a first semiconductor layer, a gate dielectric layer, and a gate electrode sequentially stacked on the substrate, the first semiconductor layer has a first portion located in a channel region of the thin film transistor and a second portion in source/drain regions of the thin film transistor and located on both sides of the first portion, the second portion and first sub-portions of the first portion adjacent to the second portion include an amorphous semiconductor material, a second sub-portion of the first portion between the first sub-portions includes a polycrystalline semiconductor material, and a second semiconductor layer located in the source/drain regions and in contact with the second portion, wherein a conductivity of the second semiconductor layer is higher than a conductivity of the amorphous semiconductor material.

Thin film transistor and method for manufacturing a thin film transistor

A display substrate is provided. The display substrate includes a substrate (), a first transistor () and a second transistor () on the substrate (), directions of intrinsic threshold voltage shifts of the first transistor () and the second transistor () being opposite; and a shift adjustment structure () on the substrate (). The shift adjustment structure () may be configured to input adjustment signals to the first transistor () and the second transistor () respectively to make threshold voltages of the first transistor () and the second transistor () shift in directions opposite to the directions of their intrinsic threshold voltage shifts respectively.

Display substrate, adjustment method thereof, and display apparatus

The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.

CMOS structure and method for manufacturing CMOS structure

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Beijing, China

Feng Guan