International Business Machines Corporation

Globalfoundries Inc.

Infineon Technologies North America Corp.

Globalfoudries Inc.

Fen Chen

Timothy Dooling Sullivan

Jeffrey P Gambino

Kai D Feng

Zhong-Xiang He

Baozhen Li

Roger Aime Dufresne

Tom C Lee

Carole D Graas

Mukta G Farooq

Prakash Periasamy

Wen Liu

Cathryn Jeanne Christiansen

Michael Anthony Shinosky

Anthony K Stamper

Ping-Chuan Wang

Alvin Wayne Strong

Lijuan Zhang

John M Aitken

John Matthew Safran

Richard Steven Kontra

John A Griesemer

Chih-Chao Yang

Christopher David Muzzy

Edward Crandal Cooney, Iii

Eric Jeffrey White

Theodore M Levin

Jason P Ritter

Patrick S Spinney

Chandrasekaran Kothandaraman

Jonathan M Pratt

Anna Tilley

Trevor A Thompson

Douglas Duane Coolbaugh

Xiao Hu Liu

Minhua Lu

Yanfeng Wang

Jason Paul Gill

John Chester Malinowski

Armin Fischer

Kevin W Kolvenbach

Charles W Griffin

Richard J St-Pierre

Robert J Gauthier, Jr

Sebastian Theodore Ventrone

Xin Ru Wang

Chandrasekharan Kothandaraman

Kevin Shawn Petrarca

Elbert Emin Huang

Rajarao Jammy

Ethan Harrison Cannon

Andrew Tae Kim

Deborah M Massey

David G Brochu, Jr

Kevin L Condon

Travis S Merrill

Pui Ling Yee

Joseph E Therrien

Robert J Gautheir

John M Aitren

Mark F Dionne

Gregory E Nuttall

Moisture detection and ingression monitoring systems and methods of manufacture are provided. The moisture detection structure includes chip edge sealing structures including at least one electrode forming a capacitor structured to detect moisture ingress within an integrated circuit. The at least one electrode and a second electrode of the capacitor is biased to ground and to a moisture detection circuit or vice versa, respectively.

Moisture detection and ingression monitoring systems and methods of manufacture

An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV and measuring an electrical resistance drop across the EM monitor wiring. The method may further include determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance. The method may further include determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.

Electromigration monitor

A structure, such as a wafer, semiconductor chip, integrated circuit, or the like, includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV) includes at least one perimeter sidewall. The EM monitor includes a first EM wire separated from the perimeter sidewall of the TSV by a dielectric.

Stress generation free thru-silicon-via structures with improved performance and reliability and methods of manufacture are provided. The method includes forming a first conductive diffusion barrier liner on an insulator layer within a thru-silicon-via of a wafer material. The method further includes forming a stress absorption layer on the first conductive diffusion barrier. The method further includes forming a second conductive diffusion barrier on the stress absorption layer. The method further includes forming a copper plate on the second conductive diffusion barrier.

Thru-silicon-via structures

A structure and a method. The structure includes a semiconductor substrate; a stack of wiring levels from a first wiring level to a last wiring level, the first wiring level closest to the semiconductor substrate and the last wiring level furthest from the semiconductor substrate, the stack of wiring levels including an intermediate wiring level between the first wiring level and the last wiring level; active devices contained in the semiconductor substrate and the first wiring level, each wiring level of the stack of wiring levels comprising a dielectric layer containing electrically conductive wire; a trench extending from the intermediate wiring level, through the first wiring level into the semiconductor substrate; and a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent or a reaction product of the chemical agent.

Semiconductor chip with anti-reverse engineering function

Moisture detection and ingression monitoring systems and methods of manufacture are provided. The moisture detection structure includes chip edge sealing structures including at least one electrode forming a capacitor structured to detect moisture ingress within an integrated circuit. The at least one electrode and a second electrode of the capacitor is biased to ground and to a moisture detection circuit.

A structure, such as a wafer, chip, IC, design structure, etc., includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV extends completely through a semiconductor chip and the EM monitor includes a plurality of EM wires proximately arranged about the TSV perimeter. An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV, measuring an electrical resistance drop across the EM monitor wiring, determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance, and/or determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.

A system for electromigration testing is disclosed. The system includes a conductive member, a cap layer of insulative material over at least a portion of a top surface of the conductive member, a cathode conductively connected to a first end of the conductive member; an anode conductively connected to a second end of the conductive member, and a current source conductively connected to the cathode and the anode. A plurality of sensory pins are disposed along a length of the conductive member between the first end and the second end of the conductive member. The sensory pins are conductively connected to a bottom surface of the conductive member. At least one measurement device is conductively connected to at least one sensory pin of the plurality of sensory pins. The at least one measurement device determines a resistance of at least one portion of the conductive member.

Electromigration testing of interconnect analogues having bottom-connected sensory pins

Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.

Via leakage and breakdown testing

Growing community of inventors

Williston, VT, United States of America

Fen Chen