Vishay Intertechnology, Inc.

Vishay-siliconix

Vishay Dale Electronics, Inc.

Vishay Sprague, Inc.

Dale Electronics, Inc.

Vishay Israel Ltd.

Vishay Precision Group, Inc.

Siliconix Incorporated

Felix Zandman

Yueh-Se Ho

Y Mohammed Kasem

Clark L Smith

Thomas L Veik

Todd L Wyatt

Thomas L Bertsch

Joseph Szwarc

Herman R Person

Robert Barry Watson

Thomas P Kieffer

George V Gerber

Jean-Michel Lanot

Frank P Sandone, Jr

On the track of a potentiometer a resistive path of thin film is deposited or a foil is bonded to a matched substrate and a parallel path is formed of discrete contact straps extending from the resistive path. The resistive path has a protecting coating and the wiper is moving on abrasion resistant contact straps. This design enables application of high precision and stability resistor technologies in the production of variable resistors destined for long service life. It enables also, in high precision applications, by maintaining the linearity of the output versus input function, a two-wire connection to the variable resistor used as a position sensor.

Precision variable resistor

A power resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the power resistor. The power resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material.

Power resistor

A methodology for selecting and properly placing foil strain gages on a transducer in a Wheatstone bridge, which provides a more consistent creep response, especially when the transducer temperature is changed. A transducer includes a counterforce subjected to a predetermined physical load that provides tension and compression strains (positive and negative, respectively). The transducer also includes a plurality of strain gage grids that are operatively attached to the counterforce in the tension and compression strain areas of the counterforce and generate electrical signals. The plurality of strain gages are electrically connected in a Wheatstone bridge circuit where their electrical signals due to creep are cancelled.

Circuit compensation in strain gage based transducers

A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.

A semiconductor package with contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

Chip scale surface mount package for semiconductor device and process of fabricating the same

A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate). Since no wire bonds are required, the resulting package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

This semiconductor surface mount package is relatively inexpensive to produce and has a footprint that is essentially the same size as the die. A conductive substrate is attached to the back side of a wafer and is in electrical contact with a terminal on the back side of each die in the wafer. A nonconductive overcoat is formed and patterned on the front side of the wafer, leaving a portion of the passivation layer and the connection pads for the dice exposed, each of the connection pads being coated with a solderable metal layer. The assembly is then sawed in perpendicular directions along the scribe lines between the dice, but the saw cuts do not extend all the way through the substrate, which remains intact at its back side. The parallel cuts in one direction are broken to produce die strips which are mounted, sandwich-like, in a stack, with one side of the strips exposed. A metal layer is sputtered or evaporated on one side of the stack; the stack is turned over and a similar process is performed on the other side of the stack. The resulting metal layers are deposited on front side of the die and extend along the edges of the die to the edges and back side of the substrate. The metal is not deposited on the surfaces of the overcoat. The strips in the stack are then separated, and the saw cuts in the perpendicular direction are broken to separate the individual dice. A thick metal layer is plated on the sputtered or evaporated layers to establish a good electrical connection between the front side and the terminal on the back side of each die. The resulting package thus includes a metal layer which wraps around the edges of the die to form an electrical connection between a location on the front side of the die and the conductive substrate. The package is essentially the same size as the die. In an alternative embodiment, a nonconductive substrate is used and vias are formed in the substrate and filled with metal to make electrical contact with the terminal on the back side of the die.

A package for a semiconductor device is formed by a process which includes forming a metal layer in contact with a connection pad on the front side of a semiconductor die while the die is still a part of a wafer. The metal layer extends into the scribe line between the die and an adjacent die. A nonconductive cap is attached to the front side of the wafer, and the wafer is ground from its back side to reduce its thickness. A cut is made from the back side of the wafer, preferably by sawing and etching, to expose the metal layer. A nonconductive layer is formed on the back side of the wafer and a second metal layer is deposited over the nonconductive layer, the second metal layer extending into the scribe line where it makes contact with the first metal layer through an opening in the nonconductive layer. Preferably, a solder post is formed on the second metal layer to allow the finished package to be mounted on a printed circuit board. The cap is then sawed along the scribe line with a saw whose kerf is small enough not to sever the contact between the metal layers. The dice are thereby completely detached from each other, forming individual semiconductor device packages.

Chip scale surface mount packages for semiconductor device and process of fabricating the same

Process of fabricating a chip scale surface mount package for semiconductor device

A method of conformally coating a capacitor with an epoxy layer of the present invention is used to coat the capacitor using fluidized bed techniques. The method includes the use of a chiller bar which is placed against the cathode surface of a capacitor slug which has been heated to 150.degree. C. The capacitor slug and chiller bar are then dipped into the fluidized bed of epoxy powder. The epoxy powder will melt to the capacitor slug on all surfaces except the surface in contact with the chiller bar. After removing the capacitor slug and chiller bar from the fluidized bed and separating the chiller bar from the capacitor, the capacitor will be coated with a layer of epoxy coating on all surfaces except the cathode surface.

Apparatus and method for conformally coating a capacitor

A bulk metal chip resistor includes an elongated resistor element having terminals at its opposite ends. The terminals are formed by coating the opposite ends of the resistor element with a conductive material. Insulative material may be molded around the center portion of the resistor to provide structural support, and the ends of the resistor can be bent downwardly so as to cause the central portion to be raised when the resistor is mounted on a circuit board. A modified form of the invention includes wrapping the resistance element around the ends of a rectangular substrate so that the substrate provides structural support. Another modified form includes placing four terminals at the four corners of the resistor element.

Bulk metal chip resistor

A precision resistor exhibiting a temperature coefficient of resistance which is very low and which is virtually independent of time, and capable of accepting high power, comprises a resistive foil applied to a substrate by means of an appropriate cement, wherein the coefficient of thermal expansion of the substrate is either at zero or as close to zero as is possible, and wherein the resistivity versus temperature characteristic of the foil selected is adjusted so as to compensate for the thermal strain induced change in resistance which results when the temperature of the assembly changes, and the device is reacting to the application of power virtually without creating a transient phenomenon due to the flow of heat. Also a method for producing such a precision resistor.

Precision power resistor with very low temperature coefficient of

A precision resistor of the type formed by defining a resistive path in a thin foil of resistance material attached to a substrate. Metallic interface layers are deposited on terminal pads between which the resistive path extends, so that when solder-coated copper leads are spot-welded to the terminal pads, the junction between the copper leads and the terminal pads is both a spot-weld and a solder connection.

Growing community of inventors

Bala Cynwyd, PA, United States of America

Felix Zandman