Taiwan Semiconductor Manufacturing Comp. Ltd.

Fei-Yun Chen

Yuan-Ko Hwang

Yuan-Pang Lee

Ping-Hung Yin

Chia-Cheng Ho

Yu-Chang Jong

Shih-Shiung Chen

Chen-Liang Chu

Chan-Yu Hung

Chen-Shiang Shieh

Kong-Beng Thei

Sheng-Liang Pan

Chi-Hsin Lo

Chia-Yu Wei

Chih-Wen Yao

Yi-Sheng Chen

Puo-Yu Chiang

Yuh-Hwa Chang

Dah-Chuen Ho

Tzu-Yang Wu

Shih-Kuang Hsiao

Hung-Hsin Liu

Eugene Chu

Michael Wu

Wei-Ya Wang

Shan-Hua Wu

Hao-Chih Yuan

Tun-Yi Ho

Yuh-Haw Chang

Eric Chao

Ni-Hwi Kuan

Shuh-Shun Chen

Jen-Shian Shieh

A semiconductor structure is provided. The semiconductor structure includes a substrate, a deep trench isolation (DTI), an interconnect structure, and a conductive pillar. The DTI is disposed in the substrate and the interconnect structure is disposed over the substrate. The conductive pillar extends from the interconnect structure toward the substrate and penetrates the DTI. A method of manufacturing the semiconductor structure is also provided.

Semiconductor structure and method of manufacturing the same

The present disclosure describes a structure with a conductive plate and a method for forming the structure. The structure includes a gate structure disposed on a diffusion region of a substrate, a protective layer in contact with the diffusion region and covering a sidewall of the gate structure and a portion of a top surface of the gate structure, and a first insulating layer in contact with the gate structure and the protective layer. The structure further includes a conductive plate in contact with the first insulating layer, where a first portion of the conductive plate laterally extends over a horizontal portion of the protective layer, and where a second portion of the conductive plate extends over a sidewall portion of the protective layer covering the sidewall of the gate structure. The structure further includes a second insulating layer in contact with the conductive plate.

Strained transistor with conductive plate

The present disclosure provides an apparatus and method for fabricating a semiconductor gate. The apparatus includes, a substrate having an active region and a dielectric region that forms an interface with the active region; a gate electrode located above a portion of the active region and a portion of the dielectric region; and a dielectric material disposed within the gate electrode, the dielectric material being disposed near the interface between the active region and the dielectric region. The method includes, providing a substrate having an active region and a dielectric region that forms an interface with the active region; forming a gate electrode over the substrate, the gate electrode having an opening near a region of the gate electrode that is above the interface; and filling the opening with a dielectric material.

Method and apparatus for forming a semiconductor gate

An integrated circuit includes a high-voltage well having a first doping type, a first doped region and a second doped region embedded in the high-voltage well, the first and second doped regions having a second doping type and spaced apart by a channel in the high-voltage well, source/drain regions formed in the first doped region and in the second doped region, each of the source/drain regions having the second doping type and more heavily doped than the first and second doped regions, first isolation regions spaced apart from each of the source/drain regions, and resistance protection oxide forming a ring surrounding each of the source/drain regions.

High voltage drain-extended MOSFET having extra drain-OD addition

A method comprising providing a first substrate and forming a first sacrificial layer over the first substrate, the first sacrificial layer comprising a curved surface portion, and forming a curved micromirror by depositing a reflective material over at the curved surface portion.

Concave and convex micromirrors and methods of making the same

A new method is provided to create a polysilicon fuse. The invention provides for applying a first oxide plasma treatment to the surface of the created polysilicon fuse, creating a thin layer of native oxide over the surface of the created polysilicon fuse, followed by a DI water rinse. This thin layer of native oxide is made more robust by applying a second oxide plasma treatment to exposed surfaces, this more robust layer of native oxide protects the polysilicon fuse during subsequent processing steps of wet photoresist and polymer removal.

Semiconductor device with robust polysilicon fuse

A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous silicon layer is resistant to attack during the post-etch solvent stripping operation due to the oxidation of exposed portions of the amorphous silicon layer by use of an oxygen plasma.

Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices

A method for releasing a micromechanical structure. A substrate is provided. At least one micromechanical structural layer is provided above the substrate, wherein the micromechanical structural layer is sustained by a sacrificial layer of a silicon material. An amine-based etchant is provided to etch the silicon material. That is, during performing a post-cleaning procedure with an amine-based etchant, polymer residue and the sacrificial layer of silicon can be simultaneously removed without any additional etching processes.

Method for releasing a micromechanical structure

A method for removing polymer containing residues from a semiconductor wafer including metal containing features including providing a semiconductor wafer having a process surface including metal containing features said process surface at least partially covered with polymer containing residues; and, subjecting the semiconductor wafer to a series of cleaning steps including sequentially exposing the process surface to at least one primary solvent and at least one intermediate solvent the at least one intermediate solvent comprising an ammonium nitrate containing solution.

Method for polymer residue removal following metal etching

A method for use in manufacturing a microelectromechanical system, such as a reflective stealth mirror includes the steps of: forming an I-shape mirror structure; forming a spacer layer over the I-shape mirror structure; and patterning the spacer layer to form at least one spacer along a side of the I-shape mirror structure.

Spacer fabrication process for manufacturing reflective stealth mirrors and other MEMS devices

The present subject matter relates to a method of stripping a photoresist after the photoresist film has been subjected to a high dose and high energy ion implant process. The method involves soaking the photoresist film in DI water, dry etching with oxygen plasma, and immersing in Caro's acid solution to improve the throughput of removing the film from the underlying substrate. The method can also be used to strip photoresist that has been hardened or altered by other types of processes such as dry etch transfer steps and chemical treatments. In some applications, the dry etching step may be omitted from the stripping process or the dry etching step may be combined with the water soak in an integrated process.

Effective photoresist stripping process for high dosage and high energy ion implantation

Method of fabricating a poly fuse

Growing community of inventors

Hsinchu, Taiwan

Fei-Yun Chen