Airoha Technology (Suzhou) Limited

Realtek Semiconductor Inc.

Fei Yan

Peng Du

Weihua Huang

Xiang-Hua Shen

Dong Qiu

De-Pin Zheng

Lidong Hu

Li-Dong Hu

A method for forwarding a vector packet processing (VPP) is applicable to a forwarding path. The forwarding path includes an interface entrance, a data plane development kit (DPDK) input end, an entrance labeling-and-categorizing plug-in unit, one or more intermediate nodes, a Tx output end, an exit labeling-and-categorizing plug-in unit, and an interface exit. The vector packet processing forwarding method includes: executing a learning-and-recording mode for a preceding packet to obtain a learning result, and in the learning-and-recording mode, having the preceding packet entirely pass through the forwarding path; and executing an optimized acceleration mode for a subsequent packet, and in the optimized acceleration mode, based on the learning result, having the subsequent packet detour at least one intermediate node of the one or more intermediate nodes in the forwarding path.

Method for forwarding vector packet processing

The present invention provides a loop detection method applicable to a mesh network including a plurality of links among a plurality of devices, including: creating a neighbor graph based on a topology maintenance message, wherein the neighbor graph represents a network structure of the mesh network; traversing the neighbor graph; and detecting whether there is a loop existing in the mesh network according to a result from traversing the neighbor graph.

Loop detection method and loop break method for mesh network

A buffer management apparatus includes a plurality of registers and a buffer block management circuit. The buffer block management circuit is used to communicate with software through the plurality of registers, and utilize pure hardware to manage a plurality of buffer blocks configured in a storage medium, for allowing the software to perform data access upon the plurality of buffer blocks.

Buffer management apparatus that uses pure hardware to manage buffer blocks configured in storage medium and associated buffer management method

The invention relates to a method, a non-transitory computer-readable storage medium, and an apparatus for load balancing of a network processing unit (NPU). A central processing unit (CPU) is coupled to the NPU and the NPU has multiple cores. The method, which is performed by the CPU, includes: reassigning a data stream processed by a first core in the NPU, which is under a high load, to a second core in the NPU, which is under a low load, where the low load is lower than the high load. The data stream is distinguished from other data streams by at least its quintuple, and the quintuple is composed of a source Internet Protocol (IP) address, a source port, a destination IP address, a destination port and a protocol type.

Method and non-transitory computer-readable storage medium and apparatus for load balancing of network processing unit

A link aggregation load balancing apparatus includes a flow monitoring circuit and an initial allocation circuit. The flow monitoring circuit is arranged to monitor flows of a plurality of member ports belonging to a link aggregation group, for performing classification upon the plurality of member ports to generate a member port classification result. The initial allocation circuit is arranged to refer to the member port classification result for selecting a target member port from the plurality of member ports to act as a forward port of a data flow.

Link aggregation load balancing apparatus for performing initial allocation through load monitoring and performing dynamic adjustment through flow statistics and associated link aggregation load balancing method

A method for forwarding a vector packet processing (VPP) is applicable to a forwarding path. The forwarding path includes an Ethernet entrance, a data plane development kit (DPDK) input end, an entrance labeling-and-categorizing plug-in unit, one or more intermediate nodes, a Tx output end, an exit labeling-and-categorizing plug-in unit, and an Ethernet exit. The vector packet processing forwarding method includes: executing a learning-and-recording mode for a preceding packet to obtain a learning result, and in the learning-and-recording mode, having the preceding packet entirely pass through the forwarding path; and executing an optimized acceleration mode for a subsequent packet, and in the optimized acceleration mode, based on the learning result, having the subsequent packet detour some intermediate nodes of the one or more intermediate nodes in the forwarding path.

The present invention provides a method of implementing an ARM64-bit floating point emulator on a Linux system, which includes: running an ARM64-bit instruction on the Linux system; applying an instruction classifier to a first feature code of a machine code indicated by the ARM64-bit instruction to determine whether the ARM64-bit instruction is an ARM64-bit floating point instruction; and, if the ARM64-bit instruction is an ARM64-bit floating point instruction, applying the instruction classifier to a second feature code of the machine code indicated by the ARM64-bit instruction to determine the ARM64-bit floating point instruction to be a specific ARM64-bit floating point instruction.

Method of implementing an ARM64-bit floating point emulator on a Linux system

A method of testing a slave device of an Inter-Integrated Circuit (IC) bus is provided. The method includes the following steps: (A) starting a first read operation or a first write operation of the slave device, the first read operation or the first write operation including a sub-operation of sending a command, an acknowledgement signal, data, an address or a control byte to the slave device; (B) sending a start command or an end command to the slave device after or during the sub-operation; (C) after step (B), performing a second read operation or a second write operation on the slave device; and (D) after step (C), determining whether the second read operation or the second write operation is correctly performed.

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Nanjing, China

Fei Yan