Boe Technology Group Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Drexel University

Xiaomi Inc.

Fei Huang

Jian Qiao Sun

Yun Qiao

Zhen Wang

Han Zhang

Wenwen Qin

Xiaozhou Zhan

Zhengkui Wang

Lele Cong

Peng Liu

Cheng Li

Jianjun Zhang

Fuqiang Li

Jun Fan

Jiguo Wang

Wei Wang

Yi Zhang

Yu Wang

Rui Liu

Shuang Zhao

Jian Sun

Alexander V Mazin

Lidong Wang

Xiehao Bao

Kun Niu

Pengjun Chen

Bailing Liu

A scan shift circuit and its driving method, a touch shift circuit and its driving method, a gate driving circuit, a touch driving circuit and a display apparatus are disclosed. The scan shift circuit includes an input circuit, a reset circuit, a latch control circuit and a scan signal output circuit. The touch shift circuit includes an input circuit, a reset circuit, a latch control circuit, a cascade signal output circuit, a touch driving circuit and a touch signal output circuit.

Scan shift circuit, touch shift circuit, driving method and related apparatus

A shift register unit and a driving method thereof, a gate driving circuit and a display apparatus are provided. The shift register unit comprises: an input circuit, a transmission circuit and an output control circuit; wherein the transmission circuit is coupled to a first node, a second node, a clock signal terminal and a first power source terminal, respectively, and is configured to control an electric potential of the second node under the control of the first node, the clock signal terminal and the first power source terminal, and the output control circuit is configured to control an electric potential of the output signal terminal under the control of the second node. The electric potential of the output signal from the output signal terminal in the shift register unit can be controlled by adopting one clock signal terminal, which effectively reduces the power consumption of the shift register unit.

Shift register unit and driving method thereof, gate driving circuit and display apparatus

The present disclosure provides a shift register, a driving method thereof, a gate driver circuit and a display device. The shift register includes a first control module, a scanning control module and a first output module.

Shift register, driving method thereof, gate driver circuit and display device

The shift register unit includes a start unit (), a pull-up node control unit (), a pull-down node control unit (), a gate driving signal output unit (), a first capacitor unit (), and a pull-up node noise reduction unit () connected to a noise reduction control end (NC), a pull-up node (PU) and a low level input end (VSS), and configured to control the pull-up node (PU) to be electrically connected to, or electrically disconnected from, the low level input end (VSS) under the control of the noise reduction control end (NC).

Shift register unit, driving method thereof, gate driving circuit and display device

The present application provides a shift register unit, a shift register circuit, a driving method, and a display apparatus, and relates to the field of display technology. The method includes: in a reset phase in which a second node is at a first level, transmitting, by a control circuit, a second level signal to a first node and an output signal terminal under the control of a voltage at the second node; and in a normal operation phase, normally operating, by the shift register unit.

Shift register unit, shift register circuit, driving method, and display apparatus

An array substrate includes plural sub-pixels in plural rows and plural columns; plural data ports; Ndl data lines, each of the Ndl data lines connecting to a column of sub-pixels, the Ndl data lines being divided into plural groups, each group including N data lines; and a multiplexer including M control lines and plural switching units in one-to-one correspondence with the Ndl data lines, each control line being connected to and controlling switching units. All of the N data lines in each group are connected to one data port through N switching units, respectively, the data lines in different groups are connected to different data ports, the N switching units corresponding to each group are controlled by N different control lines, respectively, and at least two of the N data lines in each group are provided with a data line another group therebetween.

Array substrate, liquid crystal display panel and driving method thereof that prevent liquid crystal molecules from undergoing a polarization phenomenon and have low power consumption

Some embodiments of the present disclosure provide a shift register and a method of driving the same, a gate driving circuit, and a display device. The shift register includes a first input sub-circuit for outputting a voltage on a first control voltage terminal to a pull-up node under control of a first signal input terminal; n output sub-circuits for outputting signal from output clock signal terminals to signal output terminals in sequence under control of the pull-up node; a first pull-down control sub-circuit for outputting a voltage on the first control voltage terminal to a pull-down node under control of a first clock signal terminal; a second pull-down control sub-circuit for pulling down a voltage on the pull-down node to a first voltage under control of the pull-up node; and a pull-down sub-circuit for pulling down a voltage on the pull-up node to the first voltage under control of the pull-down node.

Shift register and method of driving the same, gate driving circuit, and display device

Disclosed are an array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises a plurality of pixel units, with each of which being provided with a plurality of sub-pixels (R, G, B) arranged in a first direction; a plurality of touch control electrodes, a region where each of the touch control electrodes is located overlapping with a region where the plurality of sub-pixels (R, G, B) are located; and a plurality of touch control signal lines arranged in gaps between the sub-pixels (R, G, B), wherein each of the touch control signal lines is connected to each of the touch control electrodes, there is no touch control floating signal line not connected to each of the touch control electrodes, and one column of pixel units is correspondingly provided with one touch control signal line.

Array substrate, liquid crystal display panel and display device with no floating touch signal lines

A touch electrode driving circuit, a touch electrode driver, and a touch display device. The touch electrode driving circuit being operable to output touch scan signals to two touch electrodes. The touch electrode driving circuit includes an input terminal, a reset terminal, a first voltage terminal, a second voltage terminal, a third voltage terminal, a fourth voltage terminal, a common voltage signal terminal, a first common voltage signal control terminal, a second common voltage signal control terminal, a first clock signal terminal, a second clock signal terminal, a third clock signal terminal, a fourth clock signal terminal, a touch signal terminal, a touch control signal terminal, a first output terminal, a second output terminal, and a third output terminal.

Touch electrode driving circuit, touch electrode driver and touch display device

A shift register unit, a method of driving a shift register unit, a gate driving circuit and a touch display device are disclosed. The shift register unit includes a first signal input terminal, a first voltage control terminal, a second signal input terminal, a second voltage control terminal, a signal output terminal, a first voltage terminal, and a second voltage terminal. The shift register unit further comprises a first input circuit, a second input circuit, an output circuit, an anti-leakage circuit, a first control circuit, and a second control circuit. The anti-leakage circuit is configured to bring a first node into conduction with a second node in response to an active potential of the second voltage terminal.

Anti-leakage circuit for shift register unit, method of driving shift register unit, gate driver on array circuit and touch display device

The present disclosure discloses a shift register unit and a method for driving the same, a gate driving circuit and a display apparatus, wherein the shift register unit includes: an input sub-circuit connected to a signal input terminal and a signal control terminal, and configured to output an input signal provided at the signal input terminal under action of a control signal provided at the signal control terminal; a carry signal output sub-circuit connected to a first clock signal terminal and a first enabling signal terminal, and configured to generate a carry signal according to an input signal output by the input sub-circuit, a first clock signal provided at the first clock signal terminal and a first enabling signal provided at the first enabling signal terminal; an output sub-circuit connected to a second clock signal terminal and configured to generate an output signal according to the carry signal and a second clock signal provided at the second clock signal terminal; and a latch sub-circuit configured to latch the output signal.

Shift register unit and method for driving the same, gate driving circuit and display apparatus

The embodiments of the present disclosure relate to a shift registers unit and a driving method thereof, and a gate driving device. The shift register unit includes a first and second input circuit, a pull-down control circuit, an output circuit, a pull-down circuit, and a control circuit. The first input circuit provides a first control signal to a pull-up node. The second input circuit provides a second control signal to the pull-up node. The pull-down control circuit provides the voltage of a first voltage terminal to a pull-down node, or controls the voltage of the pull-down node. The output circuit provides a second clock signal to a signal output terminal. The pull-down circuit provides the voltage of the first voltage terminal to the pull-up node and the signal output terminal. The control circuit provides the first input signal to the pull-up node.

Shift register unit for display and driving method thereof, gate driving device

A shift register includes a first input sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit. The first input sub-circuit is configured to transmit a voltage from the first signal terminal to the first node under control of the first voltage terminal. The pull-up control sub-circuit is configured to be in a turn-on or turn-off state under control of the first node. The pull-down control sub-circuit is configured to transmit a voltage from the third voltage terminal to the pull-down node under control of the first node, transmit the voltage from the third voltage terminal to the pull-down node under control of the signal output terminal, and transmit a voltage from the first clock signal terminal to the pull-down node under control of the first clock signal terminal.

Shift register, gate driving circuit and driving method, and display apparatus

The present disclosure relates to a shift register unit. The shift register unit includes a first input circuit configured to transmit a first voltage signal to a pull-up node, a pull-up circuit configured to transmit a first clock signal to a signal output terminal, a first pull-down control circuit configured to transmit a second clock signal to a pull-down node, a second pull-down control circuit configured to transmit a second voltage signal to the pull-down node, a pull-up control circuit configured to transmit the second voltage signal to the pull-up node, a pull-down circuit configured to transmit the second voltage signal to the signal output terminal, and a holding circuit configured to maintain the pull-up node at a low level and/or maintain the pull-down node at a high level under control of a second input.

Shift register unit, shift register circuit, driving method therefor, and display panel

A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes an input circuit, an output circuit, a pull-up node pull-down circuit, a first pull-down circuit of a first pull-down node, an output pull-down circuit, a pull-up circuit of the first pull-down node and a filter circuit. The filter circuit is connected with the first pull-down node, a second pull-down node, a first power terminal and a second power terminal respectively, and is configured to filter a voltage of the first pull-down node and transmit the filtered voltage to the second pull-down node.

Growing community of inventors

Beijing, China

Fei Huang