Wuhan China Star Optoelectronics Technology Co., Ltd.

Other

Fei Ai

Guanghui Liu

Dewei Song

Chao Tian

Jiyue Song

Yanqing Guan

Fan Gong

Yong Xu

Haiming Cao

Mingyue Li

Zhifu Li

Yuan Yan

Juncheng Xiao

Peng He

Chengzhi Luo

Jianfeng Yuan

Fuhsiung Tang

Shiyu Long

Tao Ma

Wanglin Wen

Peng Lu

Rui He

Hong Cheng

Guoheng Yin

Shengyang Chen

Zhilin Wu

Chaojun Zhao

The present application discloses a gate drive circuit and a display device. The gate drive circuit includes a plurality of cascaded gate drive units, in which one of the gate drive units includes a first layout, an input module and a pull-up module. By receiving a potential changeable signal by the gate of a first transistor or the gate of a second thin-film transistor, it can alleviate or avoid current leakage caused when a first node keeps at a same voltage level for a long time, thereby improving the stability of the potential of the first node.

Gate drive circuit and display device

An array substrate and a display panel are provided. The array substrate includes a substrate, an active layer, a first insulating layer, and a first opening. The active layer is disposed on a side of the substrate and includes a first active portion and a second active portion. The first insulating layer is disposed on a side of the active layer away from the substrate and covers the active layer. The first opening is formed on the first active portion. The first opening exposes the first insulating layer. An integration of a pixel driving element and a photosensitive element on the array substrate is realized, and a photosensitive performance of the photosensitive element is improved.

Array substrate and display panel

The present application provides a display panel and a display device, the display panel includes: N scan lines, the N is an integer greater than or equal to 1; and J sets of forward and reverse scan pull-down circuits, each set of the forward and reverse scan pull-down circuits includes N forward and reverse scan pull-down modules, at least a part of each of the forward and reverse scan pull-down modules is disposed in the display subarea, and the J is an integer greater than or equal to 1. In each set of the forward and reverse scan pull-down circuits, output terminals of the N forward and reverse scan pull-down modules are connected to the N scan lines in a one-to-one correspondence.

Display panel and display device

The present application discloses a display panel, the display panel includes an active area and a irregular-shaped area, the active area includes a first active area disposed at at least one side of the irregular-shaped area and a second active area connected with the first active area. The first signal line is disposed in the second active area, the second signal line is disposed in the first active area, the first signal line and the second signal line extend in a same direction, and the length of the first signal line is larger than the length of the second signal line, and at least one of a plurality of the compensation units is connected with the second signal line.

Display panel

Embodiments of the present disclosure provide an array substrate and a display panel. The array substrate includes a first active layer, a gate electrode, a gate insulating layer, a second active layer, and a source/drain metal layer. The first active layer is connected in parallel with the second active layer through a conductor layer. Through an active layer structure with two layers in parallel, an on-state current and mobility of equivalent carriers of a device are effectively improved, and a comprehensive performance of the device is improved.

Array substrate having an active layer structure with two layers in parallel and display panel having an active layer structure with two layers in parallel

A semiconductor device and an electronic device are provided. The semiconductor device includes an insulating substrate and a thin film transistor layer. The thin film transistor layer includes a first active layer and a first insulating layer disposed on the first active layer, and a convex portion is formed on the first insulating layer. The thin film transistor layer further includes a second active layer and a third active layer disposed on both sidewalls and an upper surface of the convex portion, one end of the first active layer is connected to the second active layer, and another end of the first active layer is connected to the third active layer.

Semiconductor device reducing channel length and electronic device with the same

A display panel, a pixel driving circuit, and a display device are provided. Driving transistors include a first transistor and a second transistor connected in parallel. An absolute value of a threshold voltage of the first transistor is greater than an absolute value of a threshold voltage of the second transistor. A carrier mobility of the first transistor is greater than a carrier mobility of the second transistor. A driving current is affected by characteristics of the second transistor and an increase speed is slowed down, which improves a problem of color unevenness of the display panel at low brightness.

Display panel, pixel driving circuits, and display device

A fingerprint collection device and a display panel are provided. The fingerprint collection device includes: a base substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer. A first electrode portion is electrically connected to the photodiode through a second via. A second electrode portion is electrically connected to a first signal trace and a second signal trace through a third via and a fourth via to form a bridge structure. Since the third via, the fourth via, and the second via are formed in same process, one process can be saved.

Fingerprint collection device and display panel

A semiconductor device and an electronic device are provided. The semiconductor device includes an insulating substrate, and a non-planar layer disposed on the insulating substrate and including a non-planar structure. The non-planar structure includes a sidewall. An active pattern is configured with at least a part located on the sidewall of the non-planar structure. The active pattern includes a channel located on the sidewall. A ratio of a size of the non-planar structure in a thickness direction of the non-planar layer to a thickness of the active pattern is less than or equal to seven.

Semiconductor device and electronic device

An array substrate and a display panel are provided. The array substrate includes a substrate, an array layer, an inorganic insulation layer, a conductive electrode, a passivation layer, and a pixel electrode disposed in sequence. The array layer includes a source electrode and a drain electrode. A first via hole is defined in the array substrate. The first via hole penetrates the passivation layer and the inorganic insulation layer and exposes the drain electrode. The pixel electrode is connected to the drain electrode in the first via hole.

An embodiment of the present disclosure is directed to a display panel. The display panel includes a plurality of scan lines and a plurality of forward and reverse scan pull-down circuit. The plurality of scan lines is located on the display area. Each of the forward and reverse scan pull-down circuits includes a forward scan control module, a reverse scan control module, and a pull-down module located on a display area. The pull-down module includes an output terminal and a control terminal coupled to an output terminal of the forward scan control module and an output terminal of the reverse scan control module.

Embodiments of the present disclosure provide a display panel and a display terminal. The display panel includes at least one ultraviolet sensing transistor and at least one control transistor disposed on a substrate, and a color film substrate including a light blocking unit; wherein the ultraviolet sensing transistor includes an ultraviolet absorbing layer, and an orthographic projection of the light blocking unit on the substrate covers an orthographic projection of the ultraviolet absorbing layer on the substrate. According to the embodiment of the present disclosure, the light blocking unit absorbs or blocks the visible lights to prevent the visible lights from entering into the ultraviolet absorbing layer.

Display panel and display terminal

The present application provides a display panel and an electronic device. The electronic device comprises the display panel. The display panel comprises a gate driving unit, a first auxiliary driving unit and scan lines. The first auxiliary driving unit rapidly pulls down the falling edge of the scan signal transmitted in the scan line to reduce the delay of the falling edge of the scan line. Thus, the number of gate driving units in the display panel can be reduced, thereby reducing the width of the frame of the display panel and the electronic device.

Display panel using auxiliary driving units and electronic device

An array substrate, a manufacturing method of the array substrate, and a display panel are provided. The array substrate includes a photosensitive sensor. The photosensitive sensor includes a photosensitive module and a storage module. The photosensitive module includes a photosensitive semiconductor layer. The storage module includes a first electrode plate and a second electrode plate. Wherein, the photosensitive semiconductor layer is disposed on an extension section of a drain electrode. A number of film layer of the photosensitive sensor is decreased, and photomasks are saved.

Array substrate, manufacturing method of array substrate, and display panel

An array substrate is disclosed. The array substrate includes a semiconductor layer integrated with a PIN photoelectric diode and an active area. The PIN photoelectric diode includes a P-type semiconductor area, an N-type semiconductor area, and an I-type semiconductor area defined between the P-type semiconductor area and the N-type semiconductor area. A gate electric current is introduced at a location corresponding to the I-type semiconductor area, so as to enhance light sensitivity.

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Wuhan, China

Fei Ai