Micron Technology Incorporated

Federico Tiziani

Danilo Caraccio

Emanuele Confalonieri

Manuela Scognamiglio

Giovanni Campardo

Alberto Troia

Massimo Iaculo

Zoltan Szubbocsev

Antonino Pollio

Claudio Giaccio

Ornella Vitale

Antonino Mondello

Andrea Ghilardelli

Gian Pietro Vanalli

Stefano Corno

Massimiliano Magni

Systems and methods for providing autonomous vehicle assistance are disclosed. In one embodiment, a method is disclosed comprising recording an image of a scene surrounding an autonomous vehicle; classifying the image using a machine learning system, the classifying comprising identifying whether the image includes a danger; determining whether the autonomous vehicle is able to respond to the danger in response to identifying that the image includes the danger; and executing one or more security maneuvers, the security maneuvers manipulating the operation of the autonomous vehicle in response to the danger.

Providing autonomous vehicle assistance

Various examples are directed to a host device comprising a memory system, a host device memory, and a processor. The processor is programmed to receive from the memory system a first logical-to-physical (L2P) pointer message that comprises a first L2P pointer and a first digital signature. The processor executes a cryptographic operation based at least in part on the first L2P pointer and a cryptographic key and verifies the first digital signature based at least in part on the cryptographic operation. The processor caches the first L2P pointer at the host device memory.

Secure logical-to-physical caching

Various examples are directed to systems and methods for managing a memory system. The memory system may generate a first encrypted physical address using a first clear physical address. The memory system may generate a first encrypted logical-to-physical (L2P) pointer indicating the first logical address and a first encrypted physical address. The memory system may send the first encrypted L2P pointer to a host device for storage at a host memory.

Host side caching security for flash memory

Various embodiments comprise apparatuses and methods including a method of reconfiguring partitions in a memory device as directed by a host. The method includes managing commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and mapping portions of a second memory having the attribute enhanced set through a second interface controller. Additional apparatuses and methods are described.

Multi-partitioning of memories

A vehicle is personalized to perform at least one action (e.g., control of acceleration or navigation of the vehicle) based on configuration data for a user of the vehicle. For example, when a car is rented by a user that is a driver, the car recognizes the driver and sets itself up accordingly. In some cases, an application on a mobile device of a user communicates the settings to the car when the user rents and/or hails the car. In one example, the mobile device may carry preference settings that can be downloaded to a ride-sharing vehicle or a rented vehicle to adjust controls relevant to the role of the driver.

Personalization of a vehicle based on user settings

Various embodiments comprise devices and methods to manage multiple memory types and reconfigure partitions in a memory device as directed by a host. In one embodiment, the device is to manage logical memory partitioning on each of multiple memory devices that are based on differing, hybrid-memory technologies, the device is further to hide an actual storage media type of the multiple memory devices from the host through abstracted logical interface blocks. Additional devices and methods are described.

Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with multiple memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the multiple memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.

Controller to manage NAND memories

Various embodiments comprise devices to manage multiple memory types and reconfigure partitions in a memory device as directed by a host. In one embodiment, the apparatus is to manage commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and map portions of a second memory having the attribute enhanced set through a second interface controller. Additional devices are described.

Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with a plurality of memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the plurality of the memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.

In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.

Growing community of inventors

Munich, Germany

Federico Tiziani