Digital Equipment Corporation

Fearghal Morgan

Michael J Seaman

Stewart F Bryant

Andrew J Walton

John Rigby

Una M Quinlan

Joseph O'Callaghan

Tadhg Creedon

Richard A Gahan

Arbitration means for arbitrating between computer devices A to F which compete for access to a common bus. The system provides cascaded round-robin units. Unit RR1 has ports A, B, C, and X in sequence, with port X coupled to round-robin unit RR2, which has ports D, E, F in sequence. On each cycling of unit RR1 past C to A, unit RR2 is checked and the next one of devices D to F (in the sequence determined by unit RR2) has the opportunity of bus access. A gating circuit 13 can further restrict bus accessing by unit RR2's devices, by timing or counter control. A third round-robin unit can be added coupled to unit RR1 (which would have ports A, B, C, X,Y) or to unit RR2 (which would have ports D, E, F, Y). The assignment of devices to ports can be controllable by a matrix switch and device assignment memory.

Multi-level round robin arbitration system

The present invention provides an interlock scheme for use between a line card and an address recognition apparatus. The interlock scheme reduces the total number of read/write operations over a backplane bus coupling the line card to the address recognition apparatus required to complete a request/response transfer. Thus, the line card and address recognition apparatus are able to perform a large amount of request/response transfers with a high level of system efficiency. Generally, the interlocking scheme according to the present invention merges each ownership information storage location into the location of the request/response memory utilized to store the corresponding request/response pair to reduce data transfer traffic over the backplane bus. According to another feature of the interlock scheme of the present invention, each of the line card and the address recognition engine includes a table for storing information relating to a plurality of database specifiers. Each of the database specifiers contains control information for the traversal of a lookup database used by the address recognition apparatus. At the time the processor of a line card generates a request for the address recognition apparatus, it will analyze the protocol type information contained in the header of a data packet. The processor will utilize the protocol type information as a look-up index to its table of database specifiers for selection of one of the database specifiers. The processor will then insert an identification of the selected database specifier into the request with the network address extracted from the data packet.

Scheme for interlocking line card to an address recognition engine to

The present invention is directed to an address recognition apparatus including an address recognition engine coupled to a look-up database. The look-up database is arranged to store network information relating to network addresses. The look-up database includes a primary database and a secondary database. The address recognition engine accepts as an input a network address for which network information is required. The address recognition engine uses the network address as an index to the primary database. The primary database comprises a multiway tree node structure (TRIE) arranged for traversal of the nodes as a function of preselected segments of the network address and in a fixed sequence of the segments to locate a pointer to an entry in the secondary database. The entry in the secondary database pointed to by the primary database pointer contains the network information corresponding to the network address. The address recognition engine includes a table for storing a plurality of database specifiers. Each of the database specifiers contains control information for the traversal of the primary and secondary databases. In addition, each of the nodes in the primary database and each of the entries in the secondary database is provided with control data structures that are programmable to control the traversal of the database.

Address recognition engine with look-up database for storing network

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Galway, Ireland

Fearghal Morgan